参数资料
型号: DS1075M-60
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: XO, clock
英文描述: 60 MHz, OTHER CLOCK GENERATOR, PDIP8
封装: 0.300 INCH, DIP-8
文件页数: 8/18页
文件大小: 251K
代理商: DS1075M-60
DS1075
16 of 18
AC ELECTRICAL CHARACTERISTICS
(TA = 0°C to 70°C, VCC = 5V + 5%)
PARAMETER
SYMBOL
CONDITION
MIN TYP MAX UNITS NOTES
Output Frequency
Tolerance
DfO
VCC = 5V, TA =
25
°C
-0.5
0
+0.5
%
Combined Freq.
Variation
DfO
Over temp and
voltage
-1
+1
%
Long Term Stability
DfO
-0.5
+0.5
%
External clock
50
MHz
Maximum Input
Frequency
fOSCIN
Crystal reference
25
MHz
1
Minimum Output
Frequency
fOUT
29.3
kHz
2
Power-Up Time
tpor + tstab
0.1
1
ms
3, 4
Enable OUT from PDN ↑
tstab
0.1
1
ms
4
Enable OUT0 from
PDN ↑
tstab
0.1
1
ms
4, 5
OUT Hi-Z from PDN ↓
tpdn
1ms
OUT0 Hi-Z from PDN ↓
tpdn
1ms
Load Capacitance
(IN/OUT, OUT0)
CL
15
pF
6
Output Duty Cycle
IN/OUT, OUT0
40
60
%
Jitter
J
100
pS
7
NOTES:
1. This is the maximum frequency which can be applied to OSCIN, or, the maximum crystal frequency
that can be used.
2. The values of M, N and the frequency of OSCIN (if used) must be chosen so that this spec is met.
3. This is the time from when VCC is applied until the output starts oscillating.
4. When the device is initially powered up, or restored from the power-down mode, OE should be
asserted (high). Otherwise the start of the tstab interval will be delayed until OE goes high. OE can
subsequently be returned to a low level during the tstab interval to force out low after the tstab interval.
If the external mode is selected tstab will be a function of the OSCIN period, i.e., external clock
frequency. See “Calculated Parameters” to determine the value of tstab in this case.
5. Although OE does not normally affect OUT0 operation, if OE is held low during power-up the start of
the tstab period will be delayed until OE is asserted. If OE remains low, OUT0 will not start.
6. Operation with higher capacitive loads is possible but may impair output voltage swing and maximum
operation frequency.
7. Parameter given is a typical max.
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