参数资料
型号: DS1077Z-100
厂商: DALLAS SEMICONDUCTOR
元件分类: Clock Generator
英文描述: 100 MHz, OTHER CLOCK GENERATOR, PDSO8
封装: 0.150 INCH, SOIC-8
文件页数: 4/17页
文件大小: 103K
代理商: DS1077Z-100
DS1077
12 of 17
2-WIRE SERIAL COMMUNICATION WITH DS1077 Figure 3 (con’t)
1
S
1
C0
01
W
SDA
SCL
Control Byte
Command Byte
Start
DS1077
ACK
Read Single Byte Register or MSB from a Two-Byte Register
C1
C2
C3
C4
C5
C6
C7
A
1
R
01
Rd
A
Control Byte
Repeated
Start
DS1077
ACK
A
DS1077
ACK
NP
MSByte
Stop
Master
NACK
D1
D2
D3
D4
D5
D6
D0
D7
A2 A1 A0
1
A2 A1 A0
NP
LSByte
Stop
Master
NACK
D1
D2
D3
D4
D5
D6
D0
SDA
SCL
D7
1
S
C0
01
W
SDA
SCL
Control Byte
Command Byte
Start
DS1077
ACK
Read from a Two-Byte Register
C1
C2
C3
C4
C5
C6
C7
A
1
R
01
A
Control Byte
Repeated
Start
DS1077
ACK
A
DS1077
ACK
A
MSByte
Master
ACK
D1
D2
D3
D4
D5
D6
D7
D0
1
A2 A1 A0
Rd
1
A2 A1 A0
1
S
1
C0
01
W
SDA
SCL
Control Byte
Command Byte
Start
DS1077
ACK
Read Multiple Bytes from an Addressed Register
C1
C2
C3
C4
C5
C6
C7
A
DS1077
ACK
A2 A1 A0
1
R
01
Rd
A
Control Byte
Repeated
Start
DS1077
ACK
A
1
A2 A1 A0
A0
Starting Byte Address
A1
A2
A3
A4
A5
A6
A7
A
DS1077
ACK
NP
Byte N
Stop
Master
NACK
D1
D2
D3
D4
D5
D6
D0
D7
Byte n
D1
D2
D3
D4
D5
D6
SDA
SCL
D7
D0
A
Master
ACK
Byte (n+1)
D1
D2
D3
D4
D5
D6
D7
D0
A
Master
ACK
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