参数资料
型号: DS1862AB+
厂商: Maxim Integrated
文件页数: 27/42页
文件大小: 0K
描述: IC LASR CTRLR 7CHAN 5.5V 25CSBGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 126
类型: 激光二极管控制器(光纤)
数据速率: 10Gbps
通道数: 7
电源电压: 2.9 V ~ 5.5 V
电流 - 电源: 3mA
工作温度: -40°C ~ 100°C
封装/外壳: 25-TFBGA,CSPBGA
供应商设备封装: 25-BGA(5x5)
包装: 管件
安装类型: 表面贴装
XFP Laser Control and Digital Diagnostic IC
EXPANDED BYTES (CONTINUED)
BYTE
BYTE/WORD
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
(hex)
NAME
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
57
<1>
L-HI-V CC5 -W
L-LO-V CC5 -W
L-HI-V CC3 -W
L-LO-V CC3 -W
L-HI-V CC2 -W
L-LO-V CC2 -W
L-HI-V EE5 -W
L-LO-V EE5 -W
58
<1>
HI-TEMP-AL LO-TEMP-AL
MASK MASK
Reserved
Reserved
HI-BIAS-AL
MASK
LO-BIAS-AL
MASK
HI-TX-P-AL
MASK
LO-TX-P-AL
MASK
59
<1>
HI-RX-P-AL
MASK
LO-RX-P-AL HI-AUX1-AL LO-AUX1-AL HI-AUX2-AL LO-AUX2-AL
MASK MASK MASK MASK MASK
Reserved
Reserved
5A
5B
<1>
<1>
HI-TEMP-W
MASK
HI-RX-P-W
MASK
LO-TEMP-W
MASK
LO-RX-P-W
MASK
Reserved
HI-AUX1-W
MASK
Reserved
LO-AUX1-W
MASK
HI-BIAS-W
MASK
HI-AUX2-W
MASK
LO-BIAS-W
MASK
LO-AUX2-W
MASK
HI-TX-P-W
MASK
Reserved
LO-TX-P-W
MASK
Reserved
5C
<1>
TX-NR MASK TX-F MASK
TX-CDR-NL
MASK
RX-NR MASK
RX-LOL
MASK
RX-CDR-NL
MASK
MOD-NR
MASK
RESET-DONE
MASK
5D
5E
5F
6E
6F
74
77
78
79
7A
7B
7C
7D
7E
7F
<1>
<1>
<1>
<1>
<1>
POA <1>
Host PW <6>
Host PW <6>
Host PW <6>
Host PW <6>
PWE <6>
PWE <6>
PWE <6>
PWE <6>
Table Select <1>
APD-SUP-F
MASK
HI-V CC5 -AL
MASK
HI-V CC5 -W
MASK
TX-D
TX-NR
POA
2 31
2 23
2 15
2 7
2 31
2 23
2 15
2 7
2 7
TEC-F MASK
LO-V CC5 -AL
MASK
LO-V CC5 -W
MASK
SOFT TX-D?
TX-F
Reserved
2 30
2 22
2 14
2 6
2 30
2 22
2 14
2 6
2 6
WAVE-NL
MASK
HI-V CC3 -AL
MASK
HI-V CC3 -W
MASK
MOD-NR
Reserved
Reserved
2 29
2 21
2 13
2 5
2 29
2 21
2 13
2 5
2 5
Reserved
LO-V CC3 -AL
MASK
LO-V CC3 -W
MASK
P-DOWN/RST
RX-NR
Reserved
2 28
2 20
2 12
2 4
2 28
2 20
2 12
2 4
2 4
Reserved
HI-V CC2 -AL
MASK
HI-V CC2 -W
MASK
SOFT P-
DOWN/RST?
RX-CDR-NL
Reserved
2 27
2 19
2 11
2 3
2 27
2 19
2 11
2 3
2 3
Reserved
LO-V CC2 -AL
MASK
LO-V CC2 -W
MASK
INTERRUPT
Reserved
Reserved
2 26
2 18
2 10
2 2
2 26
2 18
2 10
2 2
2 2
Reserved
HI-V EE5 -AL
MASK
HI-V EE5 -W
MASK
RX-LOS
Reserved
Reserved
2 25
2 17
2 9
2 1
2 25
2 17
2 9
2 1
2 1
Reserved
LO-V EE5 -AL
MASK
LO-V EE5 -W
MASK
DATA-NR
Reserved
Reserved
2 24
2 16
2 8
2 0
2 24
2 16
2 8
2 0
2 0
?Bit 6 and Bit 3 of Byte 6Eh are masked by Bit 6 and Bit 5 of Byte DDh in Table 01h, respectively.
______________________________________________________________________________________
27
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