参数资料
| 型号： | DS1862AB+ |
| 厂商： | Maxim Integrated |
| 文件页数： | 36/42页 |
| 文件大小： | 0K |
| 描述： | IC LASR CTRLR 7CHAN 5.5V 25CSBGA |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 126 |
| 类型： | 激光二极管控制器（光纤） |
| 数据速率： | 10Gbps |
| 通道数： | 7 |
| 电源电压： | 2.9 V ~ 5.5 V |
| 电流 - 电源： | 3mA |
| 工作温度： | -40°C ~ 100°C |
| 封装/外壳： | 25-TFBGA，CSPBGA |
| 供应商设备封装： | 25-BGA（5x5） |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
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XFP Laser Control and Digital Diagnostic IC
Security/Password Protection
The DS1862A features two separate and independent
32-bit passwords for important memory locations. The
host password and the module password allow their
own allocated memory locations to be locked to pre-
vent write and/or read access. To enhance the security
of the DS1862A, the password entry and setting bytes
can never be read.
To gain access to host-protected or module-protected
memory locations, the correct 32-bit value must be
entered into the password entry bytes (PWE) in either a
single 4-byte write, or 4 single-byte writes. To reprogram
either password, simply enter the appropriate current
password to gain memory access, write the new Host or
module PW with one 4-byte write, and finally re-enter the
new password into the PWE to regain memory access.
Power-Up Sequence
The DS1862A does require a particular power-up
sequence to ensure proper functionality. V CC3 should
always be applied first or at the same time as V CC2 . If
this power-up sequence is not followed, then current can
be sourced out of V CC2 as if it was connected to V CC3
with a resistor internal to the DS1862A. If V CC2 is not
used then it should be externally connected to V CC3 .
Signal Conditioners—
EN1 and EN2 and THRSET
Signal Conditioners—EN1 and EN2
The EN1 and EN2 output pins are controlled by the bits
at address 01h, bits 2 and 1. The logic state of the pins
is directly analogous to the logical state of the register.
EN1 and EN2 automatically change to a high and low
state, respectively, during power-down mode as
described in the Power-Down Functionality section.
Signal Conditioners—THRSET
A programmable voltage source, THRSET, is also pro-
vided for use with signal conditioners. This source is
programmable from 0 to 1V in 256 increments.
I 2 C and Packet Error
Checking (PEC) Information
The DS1862A supports I 2 C data transfers as well as
data transfers with PEC. The slave address is unalter-
able and is set to A0h. The DS1862A, however, does
have an additional dedicated pin, MOD-DESEL, which
acts as an active-low chip select to enable communica-
tion. See the I 2 C Serial Interface and the I 2 C Operation
Using Packet Error Checking sections for details.
Precision SCALE Register
Settings for AUX2MON
The DS1862A features a factory-trimmed SCALE value
for use with DS60 or LM50 temperature sensors. If
external temperature measurement on AUX2MON is
used with one of these two sensors, the 16-bit SCALE
value can be read from Table 05h and written into the
SCALE register in Table 04h, Byte 9Ch and 9Dh. This
option allows for the most precise setting for SCALE
without requiring additional trimming. Since the SCALE
register value is precisely trimmed at the factory, the
OFFSET register will always be a nonunique value and
can simply be written into the OFFSET register. For the
DS60, the value of EF0Ah in OFFSET completes the
internal calibration. For the LM50, the value of F380h in
OFFSET completes the internal calibration.
I 2 C Serial Interface
I 2 C Definitions
The following terminology is commonly used to describe
I 2 C data transfers.
Master device: The master device controls the slave
devices on the bus. The master device generates SCL
clock pulses and START and STOP conditions.
Slave devices: Slave devices send and receive data at
the master’s request.
Bus idle or not busy: Time between STOP and START
conditions when both SDA and SCL are inactive and in
their logic-high states.
START condition: A START condition is generated by
the master to initiate a new data transfer with a slave.
Transitioning SDA from high to low while SCL remains
high generates a START condition. See Figure 14 for
applicable timing.
STOP condition: A STOP condition is generated by the
master to end a data transfer with a slave. Transitioning
SDA from low to high while SCL remains high generates
a STOP condition. See Figure 14 for applicable timing.
REPEATED START condition: The master can use a
REPEATED START condition at the end of one data
transfer to indicate that it will immediately initiate a new
data transfer following the current one. REPEATED
STARTs are commonly used during read operations to
identify a specific memory address to begin a data trans-
fer. A REPEATED START condition is issued identically
to a normal START condition. See Figure 14 for applica-
ble timing.
36
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1862AB+ | 功能描述:激光驱动器 XFP Laser Control & Digital Diagnostic RoHS:否 制造商:Micrel 数据速率:4.25 Gbps 工作电源电压:3 V to 3.6 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:QFN-16 封装:Tube |
| DS1862AB+T&R | 制造商:Maxim Integrated Products 功能描述:XFP LASER CONTROL 25CSBGA - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC LASR CTRLR 7CHAN 5.5V 25CSBGA |
| DS1862AB+T&R | 功能描述:激光驱动器 XFP Laser Control & Digital Diagnostic RoHS:否 制造商:Micrel 数据速率:4.25 Gbps 工作电源电压:3 V to 3.6 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:QFN-16 封装:Tube |
| DS1862AB+TR | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:XFP Laser Control and Digital Diagnostic IC |
| DS1862B | 功能描述:激光驱动器 RoHS:否 制造商:Micrel 数据速率:4.25 Gbps 工作电源电压:3 V to 3.6 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:QFN-16 封装:Tube |
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