参数资料
型号: DS1874T+
厂商: Maxim Integrated
文件页数: 22/88页
文件大小: 0K
描述: IC CTLR SFP+ ANLG LDD 28-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
类型: 激光二极管控制器
通道数: 1
电源电压: 2.85 V ~ 3.9 V
电流 - 电源: 2.5mA
工作温度: -40°C ~ 95°C
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 管件
安装类型: 表面贴装
其它名称: 90-1874T+000

SFP+ Controller with Digital LDD Interface
Transmit Fault (TXF) Output
IN1
IN1S
IN1C
INVOUT1
OUT1
TXF can be triggered by all alarms, warnings, and
quick trips (Figure 12). The six ADC alarms, warnings,
and the LOS quick trips require enabling (Table
01h/05h, Registers F8h and FDh). See Figures 14a and
14b for nonlatched and latched operation. Latching of
the alarms is controlled by the CNFGB and CNFGC
RSEL
RSELS
RSELC
RSELOUT
registers (Table 02h, Registers 8Ah–8Bh).
Die Identification
The DS1874 has an ID hardcoded in its die. Two regis-
ters (Table 02h, Registers CEh–CFh) are assigned for
LOS
LOS LO
LOSC
MUX
INV LOS
RXL
LOSOUT
this feature. The CEh register reads 74h to identify the
part as the DS1874, while the CFh register reads the
current device version.
3-Wire Master for Controlling
the MAX3798/MAX3799
The DS1874 controls the MAX3798/MAX3799 over a
proprietary 3-wire interface. The DS1874 acts as the
Figure 13. Logic Diagram 2
same signals and faults can also be used to generate
the internal signal FETG (Table 01h/05h, Registers FAh
and FBh). FETG is used to send a fast “turn-off” com-
mand to the laser driver. The intended use is a direct
connection to the MAX3798/MAX3799’s TXD input if
this is desired. When V CC < POA, TXDOUT is high
impedance.
DETECTION OF TXF FAULT
TXF
Figure 14a. TXF Nonlatched Operation
DETECTION OF TXF FAULT
TXD
TXF
Figure 14b. TXF Latched Operation
master, initiating communication with and generating
the clock for the MAX3798/MAX3799. It is a 3-pin inter-
face consisting of SDAOUT (a bidirectional data line),
an SCLOUT clock signal, and a CSELOUT chip-select
output (active high).
Protocol
The DS1874 initiates a data transfer by asserting the
CSELOUT pin. It then starts to generate a clock signal
22
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