参数资料
型号: DS21352L
厂商: Maxim Integrated Products
文件页数: 46/137页
文件大小: 0K
描述: IC TXRX T1 1-CHIP 3.3V 100-LQFP
产品培训模块: Lead (SnPb) Finish for COTS
产品变化通告: Product Discontinuation 20/Feb/2012
标准包装: 90
功能: 单芯片收发器
接口: HDLC,T1
电路数: 1
电源电压: 3.14 V ~ 3.47 V
电流 - 电源: 75mA
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-LQFP(14x14)
包装: 托盘
包括: DSX-1 和 CSU 线路补偿发生器,HDLC 控制器,带内回路代码发生器和检测器
DS21352/DS21552
16 of 137
4.1.1 TRANSMIT SIDE PINS (cont.)
Signal Name:
TLINK
Signal Description:
Transmit Link Data
Signal Type:
Input
If enabled via TCR1.2, this pin will be sampled on the falling edge of TCLK for data insertion into either the FDL stream
(ESF) or the Fs–bit position (D4) or the Z–bit position (ZBTSI). See Section 15 for details.
Signal Name:
TSYNC
Signal Description:
Transmit Sync
Signal Type:
Input / Output
A pulse at this pin will establish either frame or multiframe boundaries for the transmit side. Via TCR2.2, the DS21352/552
can be programmed to output either a frame or multiframe pulse at this pin. If this pin is set to output pulses at frame
boundaries, it can also be set via TCR2.4 to output double–wide pulses at signaling frames. See Section 20 for details.
Signal Name:
TSSYNC
Signal Description:
Transmit System Sync
Signal Type:
Input
Only used when the transmit side elastic store is enabled. A pulse at this pin will establish either frame or multiframe
boundaries for the transmit side. Should be tied low in applications that do not use the transmit side elastic store.
Signal Name:
TSIG
Signal Description:
Transmit Signaling Input
Signal Type:
Input
When enabled, this input will sample signaling bits for insertion into outgoing PCM T1 data stream. Sampled on the falling
edge of TCLK when the transmit side elastic store is disabled. Sampled on the falling edge of TSYSCLK when the transmit
side elastic store is enabled.
Signal Name:
TESO
Signal Description:
Transmit Elastic Store Data Output
Signal Type:
Output
Updated on the rising edge of TCLK with data out of the transmit side elastic store whether the elastic store is enabled or not.
This pin is normally tied to TDATA.
Signal Name:
TDATA
Signal Description:
Transmit Data
Signal Type:
Input
Sampled on the falling edge of TCLK with data to be clocked through the transmit side formatter. This pin is normally tied to
TESO.
Signal Name:
TPOSO
Signal Description:
Transmit Positive Data Output
Signal Type:
Output
Updated on the rising edge of TCLKO with the bipolar data out of the transmit side formatter. Can be programmed to source
NRZ data via the Output Data Format (CCR1.6) control bit. This pin is normally tied to TPOSI.
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