DS2422/DS2423
1K/4K–Bit 1–WireTM RAM with Counters
DS2422/DS2423
PRELIMINARY
021998 1/23
FEATURES
4096 bits of SRAM (DS2423), 1024 bits with the
DS2422
Four 32–bit read–only counters (DS2423), three
counters with the DS2422
Active–low external trigger inputs for two of the count-
ers with on–chip debouncing compatible with reed
and Wiegand switches
Unique, factory–lasered and tested 64–bit registra-
tion number (8–bit family code + 48–bit serial number
+ 8–bit CRC tester) assures absolute traceability
because no two parts are alike
Memory partitioned into 16 256–bit pages in DS2423,
(4 pages in DS2422), for packetizing data
256–bit scratchpad with strict read/write protocols
ensures integrity of data transfer
On–chip 16–bit CRC generator for safeguarding data
transfers
Built–in multidrop controller ensures compatibility
with other MicroLANTM products
Directlyconnectstoasingleportpinofamicroproces-
sor and communicates at up to 16.3k bits per second
Overdrive mode boosts communication speed to
142k bits per second
8–bit family code specifies device communication
requirements to reader
Presence detector acknowledges when reader first
applies voltage
Compact, low cost 6–pin TSOC surface mount pack-
age
Reads, writes and counts over a wide voltage range
of 2.8V to 5.5V from –40
°C to +85°C
PIN ASSIGNMENT
1
2
3
6
5
4
TSOC PACKAGE
TOP VIEW
3.7 X 4.0 X 1.5 mm
SIDE VIEW
PIN DESCRIPTION
Pin 1
Ground
Pin 2
Data
Pin 3
Vbat
Pin 4
NC
Pin 5
Input channel B
Pin 6
Input channel A
ORDERING INFORMATION
contact factory
DESCRIPTION
The DS2422/DS2423 1–WireTM RAM With Counters
(hereafter referred to as DS242X) is a fully static, read/
write memory for battery operation in a low cost 6–lead
TSOC surface mount package. The memory is orga-
nized as sixteen pages (DS2423) or four pages
(DS2422) of 256 bits each. In addition, the device has
four (DS2423) or three (DS2422) counters, two of them
with external trigger inputs called A and B. Each of the
counters is associated with a memory page. A counter
without external trigger input increments each time data
is written to the page it is associated with (Write Cycle
Counter). The counters triggered by inputs A and B,
respectively, increment with every low–going pulse on
their input. All counters are read–only. They are auto-
matically cleared to zero when the battery is connected.