参数资料
型号: DS2422X
厂商: DALLAS SEMICONDUCTOR
元件分类: Memory IC:Other
英文描述: SPECIALTY MEMORY CIRCUIT, UUC
文件页数: 16/23页
文件大小: 146K
代理商: DS2422X
DS2422/DS2423
021998 23/23
NOTES:
1. All voltages are referenced to ground.
2. VPUP = external pull–up voltage.
3. Input load is to ground.
4. An additional reset or communication sequence cannot begin until the reset high time has expired.
5. Read data setup time refers to the time the host must pull the 1–Wire bus low to read a bit. Data is guaranteed
to be valid within 1
s of this falling edge.
6. Capacitance on the data pin could be 800 pF when power is first applied. If a 5 k
resistor is used to pull up the
data line to VPUP, 5 s after power has been applied the parasite capacitance will not affect normal communica-
tions.
7. The reset low time (tRSTL) should be restricted to a maximum of 960 s, to allow interrupt signaling, otherwise,
it could mask or conceal interrupt pulses.
8. VIH is a function of the external pull–up resistor and VPUP .
9. Under certain low voltage conditions VILMAX may have to be reduced to as much as 0.5V to always guarantee a
presence pulse.
10. The counter inputs are designed for interfacing to mechanical switches and piezo sensors. If interfacing to digital
circuits, one should use an open–drain driver.
11. A lower impedance pull–up, e. g., for reed switches, can be achieved by connecting an external resistor from the
counter input to VBAT.
12. Read and write scratchpad (all 32 bytes) at VBAT of 3.0 V.
相关PDF资料
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