参数资料
型号: DS26503
厂商: Maxim Integrated Products, Inc.
英文描述: T1/E1/J1/64KCC BITS Element
中文描述: T1/E1/J1 BITS单元
文件页数: 74/123页
文件大小: 995K
代理商: DS26503
DS26503 T1/E1/J1 BITS Element
74 of 123
12.2 Alternate Sa/Si Bit Access Based on Double-Frame
On the receive side, the RAF and RNAF registers will always report the data as it received in the Sa and
Si bit locations. The RAF and RNAF registers are updated on align frame boundaries. The setting of the
receive align frame bit in status register 4 (SR4.0) will indicate that the contents of the RAF and RNAF
have been updated. The host can use the SR4.0 bit to know when to read the RAF and RNAF registers.
The host has 250 s to retrieve the data before it is lost.
On the transmit side, data is sampled from the TAF and TNAF registers with the setting of the transmit
align frame bit in status register 4 (SR4.3). The host can use the SR4.3 bit to know when to update the
TAF and TNAF registers. It has 250 s to update the data or else the old data will be retransmitted
. If the
TAF an TNAF registers are only being used to source the align frame and non-align frame-sync
patterns, then the host need only write once to these registers
. Data for the Si bit can come from the Si
bits of the RAF and TNAF registers, the TSiAF and TSiNAF registers, or passed through from the TSER
pin.
Register Name:
RAF
Register Description:
Receive Align Frame Register
Register Address:
56h
Bit #
7
6
5
4
Name
Si
FAS6
FAS5
FAS4
FAS3
Default
0
0
0
0
HW
Mode
Bit 0/Frame Alignment Signal Bit 0 (FAS0).
In normal operation this bit will be = 1.
Bit 1/Frame Alignment Signal Bit 1 (FAS1).
In normal operation this bit will be = 1.
Bit 2/Frame Alignment Signal Bit 2 (FAS2).
In normal operation this bit will be = 0.
Bit 3/Frame Alignment Signal Bit 3 (FAS3).
In normal operation this bit will be = 1.
Bit 4/Frame Alignment Signal Bit 4 (FAS4).
In normal operation this bit will be = 1.
Bit 5/Frame Alignment Signal Bit 5 (FAS5).
In normal operation this bit will be = 0.
Bit 6/Frame Alignment Signal Bit 6 (FAS6).
In normal operation this bit will be = 0.
Bit 7/International Bit (Si).
3
2
1
0
FAS2
0
FAS1
0
FAS0
0
0
X
X
X
X
X
X
X
X
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