参数资料
型号: DS26503LN
英文描述: T1/E1/J1 BITS Element
中文描述: T1/E1/J1收发BITS的元素
文件页数: 89/123页
文件大小: 995K
代理商: DS26503LN
DS26503 T1/E1/J1 BITS Element
89 of 123
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bit 0/ Unused, must be set = 0 for proper operation.
Bit 1/Transmit Open Circuit Detect Condition (TOCD).
0 = interrupt masked
1 = interrupt enabled–generates interrupts on rising and falling edges
Bit 2/Transmit Current Limit Exceeded Condition (TCLE).
0 = interrupt masked
1 = interrupt enabled–generates interrupts on rising and falling edges
Bit 3/Unused, must be set = 0 for proper operation.
Bit 4/Jitter Attenuator Limit Trip Event (JALT).
0 = interrupt masked
1 = interrupt enabled
Bit 5/Unused, must be set = 0 for proper operation.
Bit 6/Unused, must be set = 0 for proper operation.
Bit 7/Unused, must be set = 0 for proper operation.
IMR1
Interrupt Mask Register 1
15h
7
0
6
0
5
0
4
3
0
2
1
0
0
JALT
0
TCLE
0
TOCD
0
X
X
X
X
X
X
X
X
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