DS26524 Quad T1/E1/J1 Transceiver
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7.
PIN DESCRIPTIONS
7.1
Pin Functional Description
Table 7-1. Detailed Pin Descriptions
NAME
PIN
TYPE
FUNCTION
ANALOG TRANSMIT
TTIP1
A1, A2
TTIP2
H1, H2
TTIP3
J1 J2
TTIP4
T1, T2
Analog
Output,
High
Impedance
Transmit Bipolar Tip for Transceiver 1 to 4. These pins are differential line
driver tip outputs. These pins can be high impedance if:
If TXENABLE is low, the TTIP/TRING will be high impedance. Note that if
TXENABLE is low, the register settings for control of the TTIP/TRING are ignored
and output is high impedance.
The differential outputs of TTIPn and TRINGn can provide internal matched
impedance for E1 75
Ω , E1 120Ω, T1 100Ω, or J1 110Ω. The user has the option
of turning off internal termination.
Note: The two pins shown for each transmit bipolar tip (e.g., pins A1 and A2 for
TTIP1) should be tied together.
TRING1
A3, B3
TRING2
G3, H3
TRING3
J3, K3
TRING4
R3, T3
Analog
Output,
High
Impedance
Transmit Bipolar Ring for Transceiver 1 to 4. These pins are differential line
driver ring outputs. These pins can be high impedance if:
If TXENABLE is low, the TTIP/TRING will be high impedance. Note that if
TXENABLE is low, the register settings for control of the TTIP/TRING are ignored
and output is high impedance.
The differential outputs of TTIPn and TRINGn can provide internal matched
impedance for E1 75
Ω, E1 120Ω, T1 100Ω, or J1 110Ω. The user has the option
of turning off internal termination.
Note: The two pins shown for each transmit bipolar ring (e.g., pins A3 and B3 for
TRING1) should be tied together.
TXENABLE
L13
I
Transmit Enable. If this pin is pulled low, all transmitter outputs (TTIP and
TRING) are high impedance. The register settings for tri-state control of
TTIP/TRING are ignored if TXENABLE is low. If TXENABLE is high, the particular
driver can be tri-stated by the register settings.
ANALOG RECEIVE
RTIP1
C1
RTIP2
F1
RTIP3
L1
RTIP4
P1
Analog
Input
Receive Bipolar Tip for Transceiver 1 to 4. The differential inputs of RTIPn and
RRINGn can provide internal matched impedance for E1 75
Ω, E1 120Ω, T1 100Ω,
or J1 110
Ω. The user has the option of turning off internal termination via the LIU
Receive Impedance and Sensitivity Monitor register (
LRISMR).RRING1
C2
RRING2
F2
RRING3
L2
RRING4
P2
Analog
Input
Receive Bipolar Ring for Transceiver 1 to 4. The differential inputs of RTIPn and
RRINGn can provide internal matched impedance for E1 75
Ω, E1 120Ω, T1 100Ω,
or J1 110
Ω. The user has the option of turning off internal termination via the LIU
Receive Impedance and Sensitivity Monitor register (
LRISMR).TRANSMIT FRAMER
TSER1
F6
TSER2
E7
TSER3
R4
TSER4
N7
I
Transmit NRZ Serial Data. These pins are sampled on the falling edge of TCLK
when the transmit-side elastic store is disabled. These pins are sampled on the
falling edge of TSYSCLK when the transmit-side elastic store is enabled.
In IBO mode, data for multiple framers can be used in high-speed multiplexed
scheme. This is described in Section
8.8.2. The table there presents the
combination of framer data for each of the streams.
TSYSCLK is used as a reference when IBO is invoked.