参数资料
型号: DS3112N
厂商: Maxim Integrated Products
文件页数: 82/133页
文件大小: 0K
描述: IC MUX TEMPE T3/E3 IND 256-BGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 40
控制器类型: 调帧器,多路复用器
接口: 并行/串行
电源电压: 3.135 V ~ 3.465 V
电流 - 电源: 150mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 256-LBGA
供应商设备封装: 256-PBGA(27x27)
包装: 管件
DS3112
52 of 133
Bits 5 and 6: Frame Bit Error Insert Control Bits 0 and 1 (FBEIC0 and FBEIC1).
FBEIC1
FBEIC0
TYPE OF FRAMING BIT ERROR INSERTED
0
T3 Mode: A single F-bit error
E3 Mode: A single FAS word of 1111000000 is generated instead of the normal FAS
word, which is 1111010000 (i.e., only 1 bit inverted)
0
1
T3 Mode: A single M-bit error
E3 Mode: A single FAS word of 0000101111 is generated instead of the normal FAS
word, which is 1111010000 (i.e., all FAS bits are inverted)
1
0
T3 Mode: Four consecutive F-bit errors (causes the far end to lose synchronization)
E3 Mode: Four consecutive FAS words of 1111000000 are generated instead of the
normal FAS word, which is 1111010000 (i.e., only 1 bit inverted; causes the far end
to lose synchronization)
1
T3 Mode: Three consecutive M-bit errors (causes the far end to lose synchronization)
E3 Mode: Four consecutive FAS words of 0000101111 are generated instead of the
normal FAS word, which is 1111010000 (i.e., all FAS bits are inverted; causes the far
end to lose synchronization)
Bit 7: Manual Error Insert Mode Select (MEIMS). When this bit is set low, the device will insert errors on each
0 to 1 transition of the BPVI, EXZI, T3PBEI, T3CPBEI, or FBEI control bits. When this bit is set high, the device
will insert errors on each 0 to 1 transition of the FTMEI input signal. The appropriate BPVI, EXZI, T3PBEI,
T3CPBEI, or FBEI control bit must be set to one for this to occur. If all of the BPVI, EXZI, T3PBEI, T3CPBEI,
and FBEI control bits are set to zero, no errors are inserted.
0 = use zero to one transition on the BPVI, EXZI, T3PBEI, T3CPBEI, or FBEI control bits to insert errors
1 = use zero to one transition on the FTMEI input signal to insert errors
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