参数资料
型号: DS3251+
厂商: Maxim Integrated Products
文件页数: 42/71页
文件大小: 0K
描述: IC LIU DS3/E3/STS-1 144-CSBGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 160
类型: 线路接口装置(LIU)
驱动器/接收器数: 1/1
规程: DS3
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 144-BGA,CSPBGA
供应商设备封装: 144-TECSBGA(13x13)
包装: 托盘
产品目录页面: 1429 (CN2011-ZH PDF)
DS3251/DS3252/DS3253/DS3254
47 of 71
Table 17-D. Receiver Input Characteristics—DS3 and STS-1 Modes
(VDD = 3.3V ±5%, TA = -40°C to +85°C.)
PARAMETER
MIN
TYP
MAX
UNITS
Receive Sensitivity (Length of Cable)
900
1200
ft
Signal-to-Noise Ratio, Interfering Signal Test (Notes 1, 2)
10
Input Pulse Amplitude, RMON = 0 (Notes 2, 3)
1000
mVpk
Input Pulse Amplitude, RMON = 1 (Note 2, 3)
200
mVpk
Analog LOS Declare, RMON = 0 (Note 4)
-24
dB
Analog LOS Clear, RMON = 0 (Note 4)
-21
dB
Analog LOS Declare, RMON = 1 (Note 4)
-38
dB
Analog LOS Clear, RMON = 1 (Note 4)
-35
dB
Intrinsic Jitter Generation (Note 2)
0.03
UIP-P
Note 1:
An interfering signal (2
15 - 1 PRBS, B3ZS encoded, compliant waveshape, nominal bit rate) is added to the input signal. The
combined signal is passed through 0 to 900 feet of coaxial cable and presented to the DS325x receiver. This spec indicates the
lowest signal-to-noise ratio that results in a bit error ratio
10-9.
Note 2:
Not tested during production test.
Note 3:
Measured on the line side (i.e., the BNC connector side) of the 1:2 receive transformer (Figure 2-1). During measurement,
incoming data traffic is unframed 2
15 - 1 PRBS.
Note 4:
With respect to nominal 800mVpk signal.
Table 17-E. Receiver Input Characteristics—E3 Mode
(VDD = 3.3V ±5%, TA = -40°C to +85°C.)
PARAMETER
MIN
TYP
MAX
UNITS
Receive Sensitivity (Length of Cable)
900
1200
ft
Signal-to-Noise Ratio, Interfering Signal Test (Notes 1, 2)
12
Input Pulse Amplitude, RMON = 0 (Notes 2, 3)
1300
mVpk
Input Pulse Amplitude, RMON = 1 (Notes 2, 3)
260
mVpk
Analog LOS Declare, RMON = 0 (Note 4)
-24
dB
Analog LOS Clear, RMON = 0 (Note 4)
-21
dB
Analog LOS Declare, RMON = 1 (Note 4)
-38
dB
Analog LOS Clear, RMON = 1 (Note 4)
-35
dB
Intrinsic Jitter Generation (Note 2)
0.03
UIP-P
Note 1:
An interfering signal (2
23 - 1 PRBS, HDB3 encoded, compliant waveshape, nominal bit rate) is added to the input signal. The
combined signal is passed through 0 to 900 feet of coaxial cable and presented to the DS325x receiver. This spec indicates the
lowest signal-to-noise ratio that results in a bit error ratio
10-9.
Note 2:
Not tested during production test.
Note 3:
Measured on the line side (i.e., the BNC connector side) of the 1:2 receive transformer (Figure 2-1). During measurement,
incoming data traffic is unframed 2
23 - 1 PRBS.
Note 4:
With respect to nominal 1000mVpk signal.
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