参数资料
型号: DSP56321VF200
厂商: Freescale Semiconductor
文件页数: 61/84页
文件大小: 0K
描述: IC DSP 24BIT 200MHZ 196-BGA
标准包装: 126
系列: DSP56K/Symphony
类型: 定点
接口: 主机接口,SSI,SCI
时钟速率: 200MHz
非易失内存: ROM(576 B)
芯片上RAM: 576kB
电压 - 输入/输出: 3.30V
电压 - 核心: 1.60V
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 196-FBGA
供应商设备封装: 196-MAPBGA(15x15)
包装: 托盘
DSP56321 Technical Data, Rev. 11
4-4
Freescale Semiconductor
Design Considerations
Equation 4:
The maximum internal current (ICCImax) value reflects the typical possible switching of the internal buses on best-
case operation conditions—not necessarily a real application case. The typical internal current (ICCItyp) value
reflects the average switching of the internal buses on typical operating conditions.
Perform the following steps for applications that require very low current consumption:
1.
Set the EBD bit when you are not accessing external memory.
2.
Minimize external memory accesses, and use internal memory accesses.
3.
Minimize the number of pins that are switching.
4.
Minimize the capacitive load on the pins.
5.
Connect the unused inputs to pull-up or pull-down resistors.
6.
Disable unused peripherals.
7.
Disable unused pin activity (for example, CLKOUT, XTAL).
One way to evaluate power consumption is to use a current-per-MIPS measurement methodology to minimize
specific board effects (that is, to compensate for measured board current not caused by the DSP). A benchmark
power consumption test algorithm is listed in Appendix A. Use the test algorithm, specific test current
measurements, and the following equation to derive the current-per-MIPS value.
Equation 5:
Where:
ItypF2
=
current at F2
ItypF1
=
current at F1
F2
=
high frequency (any specified operating frequency)
F1
=
low frequency (any specified operating frequency lower than F2)
Note:
F1 should be significantly less than F2. For example, F2 could be 66 MHz and F1 could be 33 MHz. The
degree of difference between F1 and F2 determines the amount of precision with which the current rating
can be determined for an application.
4.4 Input (EXTAL) Jitter Requirements
The allowed jitter on the frequency of EXTAL is 0.5 percent. If the rate of change of the frequency of EXTAL is slow
(that is, it does not jump between the minimum and maximum values in one cycle) or the frequency of the jitter is
fast (that is, it does not stay at an extreme value for a long time), then the allowed jitter can be 2 percent. The phase
and frequency jitter performance results are valid only if the input jitter is less than the prescribed values.
I
50
10
12
×
3.3
×
33
×
10
6
×
5.48 mA
==
MIPS
I
MHz
I
typF2
I
typF1
()
F2
F1
()
==
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