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| 型号： | DSP56855BUE |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 6/52页 |
| 文件大小： | 0K |
| 描述： | IC DSP 16BIT 120MHZ 100-LQFP |
| 标准包装： | 90 |
| 系列： | 568xx |
| 核心处理器： | 56800E |
| 芯体尺寸： | 16-位 |
| 速度： | 120MHz |
| 连通性： | EBI/EMI，SCI，SSI |
| 外围设备： | DMA，POR，WDT |
| 输入/输出数： | 18 |
| 程序存储器容量： | 48KB（24K x 16） |
| 程序存储器类型： | SRAM |
| RAM 容量： | 24K x 16 |
| 电压 - 电源 (Vcc/Vdd)： | 1.62 V ~ 1.98 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 100-LQFP |
| 包装： | 托盘 |
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56855 Technical Data, Rev. 6
14
Freescale Semiconductor
64
CS3
GPIOA3
Output
Input/Output
External Chip Select (CS3)—This pin is used as a dedicated GPIO.
Port A GPIO (3)—This pin is a General Purpose I/O (GPIO) pin when not
configured for host port usage.
77
TIO0
GPIOG0
Input/Output
Input/Output
Timer Input/Output (TIO0)—This pin can be independently configured to
be either timer input source or output flag.
Port G GPIO (0)—This pin is a General Purpose I/O (GPIO) pin that can
individually be programmed as input or output pin.
16
IRQA
Input
External Interrupt Request A and B—The IRQA and IRQB inputs are
asynchronized external interrupt requests that indicate that an external
device is requesting service. A Schmitt trigger input is used for noise
immunity. They can be programmed to be level-sensitive or negative-edge-
triggered. If level-sensitive triggering is selected, an external pull-up resistor
is required for Wired-OR operation.
17
IRQB
11
MODA
GPIOH0
Input
Input/Output
Mode Select (MODA)—During the bootstrap process MODA selects one of
the eight bootstrap modes.
Port H GPIO (0)—This pin is a General Purpose I/O (GPIO) pin after the
bootstrap process has completed.
12
MODB
GPIOH1
Input
Input/Output
Mode Select (MODB)—During the bootstrap process MODB selects one of
the eight bootstrap modes.
Port H GPIO (1)—This pin is a General Purpose I/O (GPIO) pin after the
bootstrap process has completed.
13
MODC
GPIOH2
Input
Input/Output
Mode Select (MODC)—During the bootstrap process MODC selects one of
the eight bootstrap modes.
Port H GPIO (2)—This pin is a General Purpose I/O (GPIO) pin after the
bootstrap process has completed.
28
RESET
Input
Reset (RESET)—This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and placed in the
Reset state. A Schmitt trigger input is used for noise immunity. When the
RESET pin is deasserted, the initial chip operating mode is latched from the
MODA, MODB, and MODC pins.
To ensure complete hardware reset, RESET and TRST should be asserted
together. The only exception occurs in a debugging environment when a
hardware reset is required and it is necessary not to reset the
JTAG/Enhanced OnCE module. In this case, assert RESET, but do not
assert TRST.
27
RSTO
Output
Reset Output (RSTO)—This output is asserted on any reset condition
(external reset, low voltage, software or COP).
Table 3-1. 56855 Signal and Package Information for the 100-pin LQFP (Continued)
Pin No.
Signal Name
Type
Description
相关PDF资料 |
PDF描述 |
|---|---|
| DSP56857BUE | IC DSP 16BIT 120MHZ 100-LQFP |
| DSP56858FVE | IC DSP 16BIT 120MHZ 144-LQFP |
| DSP56F801FA80E | IC DSP 60MHZ 16KB FLASH 48-LQFP |
| DSP56F802TA80E | IC DSP 60MHZ 16KB FLASH 32-LQFP |
| DSP56F803BU80E | IC DSP 80MHZ 64KB FLASH 100LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DSP56855E | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56855PB | 制造商:未知厂家 制造商全称:未知厂家 功能描述:56855 Digital Signal Processor Product Brief |
| DSP56856 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Digitial Signal Controller |
| DSP56857 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56857BU120 | 功能描述:数字信号处理器和控制器 - DSP, DSC 120Mhz/120MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
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