参数资料
型号: DTMFDECODER-RD
厂商: Silicon Laboratories Inc
文件页数: 144/178页
文件大小: 0K
描述: KIT REF DESIGN DTMF DECODER
应用说明: DTMF Decoder Ref Design AppNote
标准包装: 1
主要目的: 电信,DTMF 解码器
嵌入式:
已用 IC / 零件: C8051F300
主要属性: 8kHz 采样速率模数转换器
次要属性: 16 个 Goertzel 滤波器
已供物品: 板,软件
产品目录页面: 627 (CN2011-ZH PDF)
相关产品: 336-1535-5-ND - IC 8051 MCU 8K FLASH 14-SOIC
C8051F300-GMR-ND - IC 8051 MCU 8K FLASH 11QFN
336-1245-ND - IC 8051 MCU 8K FLASH 11QFN
其它名称: 336-1283
C8051F300/1/2/3/4/5
68
Rev. 2.9
8.2.7. Register Descriptions
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved bits
should not be set to logic l. Future product versions may use these bits to implement new features in which
case the reset value of the bit will be logic 0, selecting the feature's default state. Detailed descriptions of
the remaining SFRs are included in the sections of the datasheet associated with their corresponding sys-
tem function.
SFR Definition 8.1.
Bits7–0: DPL: Data Pointer Low.
The DPL register is the low byte of the 16-bit DPTR. DPTR is used to access indirectly
addressed Flash memory.
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0x82
DPL: Data Pointer Low Byte
TH1
0x8D
Timer/Counter 1 High
TL0
0x8A
Timer/Counter 0 Low
TL1
0x8B
Timer/Counter 1 Low
TMOD
0x89
Timer/Counter Mode
TMR2RLH
0xCB
Timer/Counter 2 Reload High
TMR2RLL
0xCA
Timer/Counter 2 Reload Low
TMR2H
0xCD
Timer/Counter 2 High
TMR2L
0xCC
Timer/Counter 2 Low
XBR0
0xE1
Port I/O Crossbar Control 0
XBR1
0xE2
Port I/O Crossbar Control 1
XBR2
0xE3
Port I/O Crossbar Control 2
0x97, 0xAE, 0xAF, 0xB4,
0xB6, 0xBF, 0xCE, 0xD2,
0xD3, 0xD4, 0xD5, 0xD6,
0xD7, 0xDD, 0xDE, 0xDF,
0xF5
Reserved
Table 8.3. Special Function Registers* (Continued)
Register
Address
Description
Page
No.
*Note: SFRs are listed in alphabetical order. All undefined SFR locations are reserved
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