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| 型号： | E-1110 |
| 英文描述： | E-1110 10/100/1000 Mbits/s Ethernet MAC preliminary technical manual 4/01 |
| 中文描述： | 电子1110 10/100/1000 Mbits /秒以太网MAC初步的技术手册4 / 01 |
| 文件页数： | 26/108页 |
| 文件大小： | 577K |
| 代理商： | E-1110 |
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2-14
Functional Description
occurs when the MAC receives at least one byte of data beyond a valid
preamble and SFD symbol sequence.
The receive statistics provided through the MAC receive function can be
used for RMON and SNMP support. However, the MAC does not collect
the statistics specically mentioned in the RMON and SNMP standard
specications. The MAC provides the basic per frame information that
can be collected with an application built on top of the MAC. The
collected information can then be used for RMON and SNMP support.
Gigabit MAC Bit Budget – Not Required in the full-duplex mode.
2.1.3.2 Gigabit MAC Receive Sequence
Gigabit Mode – The Gigabit MAC always receives data over the GMII
interface. In the TBI mode, the data is received from the PHY interface
through the PHY Multiplexer and sent to the PCS block. The PCS then
outputs the data after 8B/10B decoding to the Gigabit MAC over the GMII
interface. The Gigabit MAC detects the preamble and SFD according to
IEEE 802.3. It then sends the frame without the SFD and preamble to
the host through the host interface module. The MRX_SOP signal
indicates the start of packet. The MRX_DVALID signal indicates the
validity of data and MRX_EOP indicates the end of packet. The
E-1110 core needs an MRX_ACK transition for every MRX_DVALID. If
MRX_DVALID is asserted and MRX_ACK is not received on the same
clock, the Gigabit MAC assumes an underrun condition and aborts the
receive operation. Similarly, the host can assert MRX_ABORT to abort
the receive operation. The Gigabit MAC checks the CRC value and
checks for error conditions according to the IEEE 802.3 protocol.
A new RMON vector is output at the end of the receive operation through
assertion of RX_STATUS_ACTIVE and an update of
MACRX_STATUS[41:0].
10/100 Mode – In the 10/100 mode, the E-1110 PHY interface is
congured in the MII mode. The demultiplexed signals are output over
the MII bus to the E-110 core, which receives the frame and starts
sending it to the E-1110 core. The E-1110 core detects the start of a new
frame from the E-110 and asserts MRX_SOP and MRX_DVALID on the
host packet interface. The E-110 outputs data on every alternate
E110_MRXC clock cycle to the E-1110. The E-1110 synchronizes the
data to the host clock and sends it over the host interface with assertion
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