3-4
Signals
overow error packets, to indicate an end of the received
packet for the MAC.
MRX_ACK
Receive Data Acknowledge
Input
MRX_ACK, when asserted, indicates that the host
receive data buffer function is ready to accept data. If the
MAC asserts the MRX_DVALID output signal and the
MRX_ACK input signal is deasserted, a receive overow
error condition is declared and the packet being received
is rejected. The MAC samples MRX_ACK synchronously
at 125 MHz whenever MRX_DVALID is asserted.
Generally, the host interface should always assert this
signal unless the host bus is unable to adequately buffer
and manage the data being received.
MRX_ABORT Abort Packet Receive
Input
This signal, when asserted for one clock cycle, aborts the
receive packet process. It can be asserted anytime
between the assertion of MRX_SOP and assertion of
MRX_EOP.
The MAC ignores MRX_ABORT if it is asserted when the
MRX_EOP signal is active; otherwise it generates an
overow error condition for the MAC.
ACCEPT_CRC Accept Packets With CRC error
Input
ACCEPT_CRC, when asserted, instructs the MAC to
mask the REJECT bit (RXSV36) of the Receive Statistics
Vector and allow the MAC receive function to accept
frames with CRC errors. Note that all frames received by
the Gigabit MAC are passed to the host’s receive function
interface.
ACCEPT_RUNT
Accept Runt Frames
Input
ACCEPT_RUNT, when asserted, instructs the MAC
receive function to mask the REJECT bit (RXSV36) of the
Receive Statistics Vector and accept short frames.
ACCEPT_LONG
Accept Long Frames
Input
ACCEPT_LONG, when asserted, instructs the MAC
receive function to mask the REJECT bit (RXSV36) in the
Receive Statistics Vector (RXSV36) and accept frames