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| 型号： | EM6640SO18A |
| 英文描述： | Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP; Temperature Range: -40°C to 85°C; Package: 8-SOIC |
| 中文描述： | 微控制器 |
| 文件页数： | 6/62页 |
| 文件大小： | 620K |
| 代理商： | EM6640SO18A |
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EM6640
03/02 REV. C/446
Copyright
2002, EM Microelectronic-Marin SA
14
www.emmicroelectronic.com
5.2 Prescaler
The input to the prescaler is the system clock signal. The prescaler consists of nineteen elements divider chain
which delivers clock signals for the peripheral circuits such as timer/counter, debouncers and edge detectors, as
well as generating prescaler interrupts. Power on initializes the prescaler to $0000.
Table 5.2.1 Prescaler clock name definition
function
name
value
function
name
value
system clock
ck[20]
600000 Hz
system clock / 1024
ck[10]
586 Hz
system clock / 2
ck[19]
300000 Hz
system clock / 2048
ck[9]
293 Hz
system clock / 4
ck[18]
150000 Hz
system clock / 4096
ck[8]
146 Hz
system clock / 8
ck[17]
75000 Hz
system clock / 8192
ck[7]
73 Hz
system clock/ 16
ck[16]
37500 Hz
system clock / 16384
ck[6]
37 Hz
system clock / 32
ck[15]
18750 Hz
system clock / 32768
ck[5]
18 Hz
system clock / 64
ck[14]
9375 Hz
system clock / 65536
ck[4]
9.2 Hz
system clock / 128
ck [13]
4688 Hz
system clock / 131072
ck[3]
4.6 Hz
system clock / 256
ck [12]
2344 Hz
system clock / 262144
ck[2]
2.3 Hz
system clock / 512
ck[11]
1172 Hz
system clock / 524288
ck[1]
1.1 Hz
Table 5.2.2 Control of prescaler register RegPresc
Bit
Name
Reset
R/W
Description
3
PWMOn
0
R/W
see 10 bit counter
2
ResPresc
0
R/W
Write Reset prescaler
1 -> Resets the divider chain
from ck[17] down to
ck[1]
0 -> no action.
The Read value is always '0'
1
0
R
The Read value is always '0'
0
DebSel
0
R/W
Debouncer clock select.
0 -> debouncer with ck[8]
1 -> debouncer with ck[17]
The Prescaler contains 3 interrupt sources:
- IRQ9k4Hz ; this is ck[14] positive edge interrupt.
- IRQ586Hz ; this is ck[10] positive edge interrupt.
- IRQ1Hz ; this is ck[1] positive edge interrupt.
There is no interrupt generation on reset.
In reset mode, ck[1] is set to a high level.
The first IRQ1Hz Interrupt occurs
1sec (600kHz)
after reset.
Figure 12. Prescaler frequency timing
System clock
ck[20]
ck[19]
ck[17]
Horizontal Scale Change
ck[2]
ck[1]
First Positive Edge of ck[1] clock comes
one period after falling reset edge.
Prescaler Reset
ck[2]
IRQ
1Hz
ck[1]
Figure 13. Prescaler Interrupts example:
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