参数资料
型号: EP20K300EQC240-3
厂商: Altera
文件页数: 74/117页
文件大小: 0K
描述: IC APEX 20KE FPGA 300K 240-PQFP
产品培训模块: Three Reasons to Use FPGA's in Industrial Designs
标准包装: 24
系列: APEX-20K®
LAB/CLB数: 1152
逻辑元件/单元数: 11520
RAM 位总计: 147456
输入/输出数: 152
门数: 728000
电源电压: 1.71 V ~ 1.89 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 240-BFQFP
供应商设备封装: 240-PQFP(32x32)
6
Altera Corporation
APEX 20K Programmable Logic Device Family Data Sheet
General
Description
APEXTM 20K devices are the first PLDs designed with the MultiCore
architecture, which combines the strengths of LUT-based and product-
term-based devices with an enhanced memory structure. LUT-based logic
provides optimized performance and efficiency for data-path, register-
intensive, mathematical, or digital signal processing (DSP) designs.
Product-term-based logic is optimized for complex combinatorial paths,
such as complex state machines. LUT- and product-term-based logic
combined with memory functions and a wide variety of MegaCore and
AMPP functions make the APEX 20K device architecture uniquely suited
for system-on-a-programmable-chip designs. Applications historically
requiring a combination of LUT-, product-term-, and memory-based
devices can now be integrated into one APEX 20K device.
APEX 20KE devices are a superset of APEX 20K devices and include
additional features such as advanced I/O standard support, CAM,
additional global clocks, and enhanced ClockLock clock circuitry. In
addition, APEX 20KE devices extend the APEX 20K family to 1.5 million
gates. APEX 20KE devices are denoted with an “E” suffix in the device
name (e.g., the EP20K1000E device is an APEX 20KE device). Table 8
compares the features included in APEX 20K and APEX 20KE devices.
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EP20K300EQI240-1ES 制造商:未知厂家 制造商全称:未知厂家 功能描述:FPGA
EP20K300EQI240-2ES 制造商:未知厂家 制造商全称:未知厂家 功能描述:FPGA
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