参数资料
| 型号： | EP4S100G5F45I1 |
| 厂商： | Altera |
| 文件页数： | 4/22页 |
| 文件大小： | 0K |
| 描述： | IC STRATIX IV FPGA 530K 1932FBGA |
| 产品培训模块： | Three Reasons to Use FPGA's in Industrial Designs |
| 标准包装： | 3 |
| 系列： | STRATIX® IV GT |
| LAB/CLB数： | 21248 |
| 逻辑元件/单元数： | 531200 |
| RAM 位总计： | 28033024 |
| 输入/输出数： | 781 |
| 电源电压： | 0.92 V ~ 0.98 V |
| 安装类型： | 表面贴装 |
| 工作温度： | -40°C ~ 100°C |
| 封装/外壳： | 1932-BBGA |
| 供应商设备封装： | 1932-FBGA（45x45） |
1
–12
Chap
te
r1:
Ove
rvie
w
fo
rth
e
St
ra
tix
IV
De
vic
e
Family
Ar
chitec
tur
eFea
tur
es
Stra
Sep
tember
2
012
Al
tera
Cor
por
atio
n
Volume
M9K Blocks
(256 x
36 bits)
462
660
950
1,235
936
1,248
1,280
M144K
Blocks
(2048 x
72 bits)
16
20
22
36
48
64
Total Memory
(MLAB+M9K
+M144K) Kb
7,370
9,564
13,627
17,133
17,248
22,564
27,376
Embedded
Multipliers
18 x 18 (2)
384
512
920
1,288
832
1,040
1,02
4
1,024
PLLs
3
4
3
4
3
6
8
3
6
8
4
6
8
12
4
6
8
12
User I/Os (3)
372
488
372
48
8
372
56
4
56
4
74
4
372
564
56
4
74
4
289
564
56
4
74
4
88
0
92
0
289
564
56
4
74
4
88
0
920
880
920
Speed Grade
(fastest to
slowest) (5)
–2
,
–3,
–4
–2,
–3,
–4
–2
,
–3,
–4
–2
,
–3,
–4
–2,
–3,
–4
–2
,
–3,
–4
–2
,
–3,
–4
–2
,
–3
,
–4
–2,
–3,
–4
–2
,
–3,
–4
–2
,
–3,
–4
–2,
–3,
–4
–2,
–3,
–4
–2
,
–3,
–4
–2
,
–3,
–4
–2,
–3,
–4
–2,
–3,
–4
–2,
–3,
–4
–2,
–3,
–4
–2
,
–3,
–4
–2
,
–3,
–4
–2,
–3,
–4
–2,
–3,
–4
–2,
–3,
–4
–2,
–3,
–4
–2, –3,
–4
–2, –3,
–4
Notes to Table 1–1:
(1) The total number of transceivers is divided equally between the left and right side of each device, except for the devices in the F780 package. These devices have eight transceiver channels located only
on the right side of the device.
(2) Four multiplier adder mode.
(3) The user I/Os count from pin-out files includes all general purpose I/O, dedicated clock pins, and dual purpose configuration pins. Transceiver pins and dedicated configuration pins are not included in
the pin count.
(4) Total pairs of high-speed LVDS SERDES take the lowest channel count of RX/TX.
(5) The difference between the Stratix IV GX devices in the –2 and –2x speed grades is the number of available transceiver channels. The –2 device allows you to use the transceiver CMU blocks as
transceiver channels. The –2x device does NOT allow you to use the CMU blocks as transceiver channels. In addition to the reduction of available transceiver channels in the Stratix IV GX –2x device,
the data rates in the –2x device are limited to 6.5 Gbps.
Table 1–1. Stratix IV GX Device Features (Part 2 of 2)
Feature
EP4SGX70
EP4SGX110
EP4SGX180
EP4SGX230
EP4SGX290
EP4SGX360
EP4SGX530
Package
Option
F780
F
1152
F780
F
1152
F780
F
1152
F1
517
F780
F
1152
F1
517
F780
F
1152
F
1517
F
1760
F1
932
F780
F
1152
F
1517
F
1760
F
1932
F
1760
F
1932
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|---|---|
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EP4S100G5F45I1N | 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV 21248 LABs 781 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EP4S100G5F45I1NGA | 制造商:Altera Corporation 功能描述: |
| EP4S100G5F45I2 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV 21248 LABs 781 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EP4S100G5F45I2N | 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV 21248 LABs 781 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EP4S100G5F45I3 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV 21248 LABs 781 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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