参数资料
| 型号： | EPC16UC88AA |
| 厂商： | Altera |
| 文件页数： | 8/36页 |
| 文件大小： | 0K |
| 描述： | IC CONFIG DEVICE 16MBIT 88-UBGA |
| 标准包装： | 80 |
| 系列： | EPC |
| 可编程类型： | 系统内可编程 |
| 存储容量： | 16Mb |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 88-LFBGA |
| 供应商设备封装： | 88-UBGA（11x8） |
| 包装： | 托盘 |
| 其它名称： | 544-1373 EPC16UC88AA-ND |
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Page 16
Functional Description
Enhanced Configuration (EPC) Devices Datasheet
January 2012
Altera Corporation
Intel Flash-Based EPC Device Protection
In the absence of the lock bit protection feature in the EPC4, EPC8, and EPC16 devices
with Intel flash, Altera recommends four methods to protect the Intel Flash content in
EPC4, EPC8, and EPC16 devices. Any method alone is sufficient to protect the flash.
The methods are listed here in the order of descending protection level:
1. Using an RP# of less than 0.3 V on power-up and power-down for a minimum of
100 ns to a maximum 25 ms disables all control pins, making it impossible for a
write to occur.
2. Using VPP < VPPLK, where the maximum value of VPPLK is 1 V, disables writes.
VPP < VPPLK means programming or writes cannot occur. VPP is a programming
supply voltage input pin on the Intel flash. VPP is equivalent to the VCCW pin on
EPC devices.
3. Using a high CE# disables the chip. The requirement for a write is a low CE# and
low WE#. A high CE# by itself prevents writes from occurring.
4. Using a high WE# prevent writes because a write only occurs when the WE# is low.
Performing all four methods simultaneously is the safest protection for the flash
content.
The following lists the ideal power-up sequence:
1. Power up VCC.
2. Maintain VPP< VPPLK until VCC is fully powered up.
3. Power up VPP.
4. Drive RP# low during the entire power-up process. RP# must be released high
within 25 ms after VPP is powered up.
1 CE# and WE# must be high for the entire power-up sequence.
The following lists the ideal power-down sequence:
1. Drive RP# low for 100 ns before power-down.
2. Power down VPP < VPPLK.
3. Power down VCC.
4. Drive RP# low during the entire power-down process.
1 CE# and WE# must be high for the entire power-down sequence.
The RP# pin is not internally connected to the controller. Therefore, an external
loop-back connection between C-RP# and F-RP# must be made on the board even
when you are not using the external device to the RP# pin with the loop-back
connection. Always tri-state RP# when the flash is not in use.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EPC16UC88N | 功能描述:FPGA-配置存储器 IC - Ser. Config Mem Flash 16Mb 33 MHz RoHS:否 制造商:Altera Corporation 存储类型:Flash 存储容量:1.6 Mbit 工作频率:10 MHz 电源电压-最大:5.25 V 电源电压-最小:3 V 电源电流:50 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:PLCC-20 |
| EPC16UI88AA | 功能描述:FPGA-配置存储器 IC - Ser. Config Mem Flash 16Mb 33 MHz RoHS:否 制造商:Altera Corporation 存储类型:Flash 存储容量:1.6 Mbit 工作频率:10 MHz 电源电压-最大:5.25 V 电源电压-最小:3 V 电源电流:50 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:PLCC-20 |
| EPC16UI88N | 功能描述:FPGA-配置存储器 IC - Ser. Config Mem Flash 16Mb 33 MHz RoHS:否 制造商:Altera Corporation 存储类型:Flash 存储容量:1.6 Mbit 工作频率:10 MHz 电源电压-最大:5.25 V 电源电压-最小:3 V 电源电流:50 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:PLCC-20 |
| EPC16XXX | 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:2. Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet |
| EPC17 | 制造商:TDK 制造商全称:TDK Electronics 功能描述:Ferrite Cores For Power Supply and Signal Transformer EPC Cores |
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