参数资料
型号: EPF10K130EFC484-1X
厂商: Altera
文件页数: 59/100页
文件大小: 0K
描述: IC FLEX 10KE FPGA 130K 484-FBGA
产品培训模块: Three Reasons to Use FPGA's in Industrial Designs
标准包装: 60
系列: FLEX-10KE®
LAB/CLB数: 832
逻辑元件/单元数: 6656
RAM 位总计: 65536
输入/输出数: 369
门数: 342000
电源电压: 2.375 V ~ 2.625 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 484-BGA
供应商设备封装: 484-FBGA(23x23)
其它名称: EPF10K130EFC4841X
Altera Corporation
61
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Notes to tables:
(1)
Microparameters are timing delays contributed by individual architectural elements. These parameters cannot be
measured explicitly.
(2)
Operating conditions: VCCIO = 3.3 V ±10% for commercial or industrial use.
(3)
Operating conditions: VCCIO = 2.5 V ±5% for commercial or industrial use in EPF10K30E, EPF10K50S,
EPF10K100E, EPF10K130E, and EPF10K200S devices.
(4)
Operating conditions: VCCIO = 3.3 V.
(5)
Because the RAM in the EAB is self-timed, this parameter can be ignored when the WE signal is registered.
(6)
EAB macroparameters are internal parameters that can simplify predicting the behavior of an EAB at its boundary;
these parameters are calculated by summing selected microparameters.
(7)
These parameters are worst-case values for typical applications. Post-compilation timing simulation and timing
analysis are required to determine actual worst-case performance.
(8)
Contact Altera Applications for test circuit specifications and test conditions.
(9)
This timing parameter is sample-tested only.
(10) This parameter is measured with the measurement and test conditions, including load, specified in the PCI Local
Bus Specification, revision 2.2.
Table 30. External Bidirectional Timing Parameters
Symbol
Parameter
Conditions
tINSUBIDIR
Setup time for bi-directional pins with global clock at same-row or same-
column LE register
tINHBIDIR
Hold time for bidirectional pins with global clock at same-row or same-column
LE register
tINH
Hold time with global clock at IOE register
tOUTCOBIDIR
Clock-to-output delay for bidirectional pins with global clock at IOE register
C1 = 35 pF
tXZBIDIR
Synchronous IOE output buffer disable delay
C1 = 35 pF
tZXBIDIR
Synchronous IOE output buffer enable delay, slow slew rate= off
C1 = 35 pF
相关PDF资料
PDF描述
A1280A-PQ160C IC FPGA 8K GATES 160-PQFP COM
A1280A-PQG160C IC FPGA 8K GATES 160-PQFP COM
170-050-173L030 CONN DB50 CRIMP MALE NICKEL
ACB91DHFD-S578 EDGECARD 182POS .050 SMD W/POSTS
170-050-173L020 CONN DB50 CRIMP MALE NICKEL
相关代理商/技术参数
参数描述
EPF10K130EFC484-2 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 832 LABs 369 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K130EFC484-2N 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 832 LABs 369 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K130EFC484-2X 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 832 LABs 369 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K130EFC484-3 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 832 LABs 369 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K130EFC484-3N 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 832 LABs 369 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256