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参数资料
型号： EPF10K30RC208-3N
厂商： Altera
文件页数： 61/128页
文件大小： 0K
描述： IC FLEX 10K FPGA 30K 208-RQFP
产品培训模块： Three Reasons to Use FPGA's in Industrial Designs
产品变化通告： Package Change 30/Jun/2010
标准包装： 48
系列： FLEX-10K®
LAB/CLB数： 216
逻辑元件/单元数： 1728
RAM 位总计： 12288
输入/输出数： 147
门数： 69000
电源电压： 4.75 V ~ 5.25 V
安装类型： 表面贴装
工作温度： 0°C ~ 85°C
封装/外壳： 208-BFQFP 裸露焊盘
供应商设备封装： 240-RQFP（32x32）
其它名称： 544-2228
38
Altera Corporation
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Figure 17. Enabling ClockLock & ClockBoost in the Same Design
To use both the ClockLock and ClockBoost circuits in the same design,
designers must use Revision C EPF10K100GC503-3DX devices and
MAX+PLUS II software versions 7.2 or higher. The die revision is
indicated by the third digit of the nine-digit code on the top side of the
device.
Output
Configuration
This section discusses the peripheral component interconnect (PCI)
pull-up clamping diode option, slew-rate control, open-drain output
option, MultiVolt I/O interface, and power sequencing for FLEX 10K
devices. The PCI pull-up clamping diode, slew-rate control, and
open-drain output options are controlled pin-by-pin via Altera logic
options. The MultiVolt I/O interface is controlled by connecting VCCIO to
a different voltage than VCCINT. Its effect can be simulated in the Altera
software via the Global Project Device Options dialog box (Assign
menu).
PCI Clamping Diodes
The EPF10K10A and EPF10K30A devices have a pull-up clamping diode
on every I/O, dedicated input, and dedicated clock pin. PCI clamping
diodes clamp the transient overshoot caused by reflected waves to the
VCCIO value and are required for 3.3-V PCI compliance. Clamping diodes
can also be used to limit overshoot in other systems.
Clamping diodes are controlled on a pin-by-pin basis via a logic option in
the Altera software. When VCCIO is 3.3 V, a pin that has the clamping
diode turned on can be driven by a 2.5-V or 3.3-V signal, but not a 5.0-V
signal. When VCCIO is 2.5 V, a pin that has the clamping diode turned on
can be driven by a 2.5-V signal, but not a 3.3-V or 5.0-V signal. However,
a clamping diode can be turned on for a subset of pins, which allows
devices to bridge between a 3.3-V PCI bus and a 5.0-V device.
DQ
a
b
aout
bout
gclk1
CLKLOCK
CLOCKBOOST=1
INPUT_FREQUENCY=50
CLOCKBOOST=2
INPUT_FREQUENCY=50
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相关代理商/技术参数
参数描述
EPF10K30RC208-4 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 216 LABs 147 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K30RC208-4N 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 216 LABs 147 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K30RC240-3 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 216 LABs 189 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K30RC240-3N 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 216 LABs 189 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K30RC240-4 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 216 LABs 189 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
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