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| 型号： | EPF10K40 |
| 厂商： | Altera Corporation |
| 英文描述： | Embedded Programmable Logic Family(FLEX10K嵌入式可编程逻辑系列) |
| 中文描述： | 嵌入式可编程逻辑系列（FLEX10K嵌入式可编程逻辑系列） |
| 文件页数： | 4/10页 |
| 文件大小： | 230K |
| 代理商： | EPF10K40 |
Philips Semiconductors
Application note
AN116
Applications for the NE521/522/527/529
1988 Dec
4
comparators run with large signal and ground currents. If this gate
ground current is allowed to pass near the input signal path, the
small impedances of the ground circuit will cause millivolt changes in
reference or signal voltages producing errors, sustained oscillation,
ringing, or excessive V
OS
. A ground plane arranged such that output
currents do not flow near input areas is highly recommended.
Power Supplies
Another general precaution that should always be exercised is
power supply bypassing. As mentioned, the name of the game is
speed. Very high-speed gates are used to produce the desired
output logic levels. Maximizing response speed also requires higher
current levels, giving rise to power supply noise. For this reason,
good power supply bypassing very close to the device itself is
always mandatory. A tantalum capacitor of 1 to 10
μ
F in parallel with
500 to 1000pF will prove effective in most cases. Lead lengths
should be as short as physically possible to preserve low
impedances at high frequency.
Unused Inputs
Some currently available comparators such as the NE521 and
NE522 are dual devices. Most often both sections of these devices
will be utilized. Should a system utilize one device, the unused
inputs should be biased in a known condition. The high
gain-bandwidth may otherwise cause oscillations in the unused
comparator section. A low impedance should be provided from both
unused inputs to ground. A resistor of relatively high impedance may
then be used to supply a differential input on the order of 100mV to
insure the comparator assumes a known state.
COLLECTOR CONTACT
EMITTER CONTACT
BASE CONTACT
ISOLATION
P TYPE SUBSTRATE
SCHOTTKY DIODE
GUARD RING
P+
N
N+
N+
N+
P
P
P+
S
I
S
2
ISOLATION
SL00731
Figure 5. Schottky Clamped Transistor Geometry
DEVICE
NE521
PROP
DELAY (ns)
12
V
(mV)
7.5
I
OS
(
μ
A)
5
I
BIAS
(
20
GAIN
5000
CMR
(V)
±
3
BENEFITS
Dual, very fast, standard
supplies TTL
compatible, individual &
common strobe.
Same as NE521 plus
open-collector outputs
for additional decoding.
Fast, very low input
current differential
outputs, flexible surplus
wide common-mode
range.
Same as NE527 but
with faster response.
High common-mode
input range,
±
5V to
±
15V supply, strobe
input, open-collector
output.
Low input bias, dual,
+5V to
±
15V supply,
open-collector output.
NE522
15
7.5
5
5000
±
3
20
NE527
26
6
0.75
5000
±
6
2
NE529
22
6
5
5000
±
6
20
LM311
200
7.5
0.05
200k
±
30
0.25
LM319
80
8
0.2
40k
±
5
1.2
LM339
1300
2
0.05
200k
V+
Low input bias, dual,
+5V to
±
15V supply,
open-collector output.
0.25
–1.5V
LM393
1300
2
0.05
200k
V+
Same as LM339 but
dual.
0.25
–1.5V
NOTE:
Parameters are based on min/max limits at 25
°
C as defined in the individual data sheet.
SL00732
Figure 6. Comparator Selection Guide
If the inverting input is tied to the positive differential voltage the gate
output will be low. The strobe inputs then provide a means of
utilizing the Schottky gate for other system logic functions.
If the strobe inputs are not used, they should be connected to the
output of a logic gate that is always high, or to the +5V supply
through a 5 to 10k
resistor. They should never be tied directly to
the +5V supply as the relatively minor spiking on the supply may
damage these inputs.
Common-Mode Signals
Manufacturers specify the maximum voltage range over which the
inputs may be taken. In
addition, the maximum differential voltage that may be safely applied
to the inputs is specified. In the case of the NE529 comparator, the
differential voltage is restricted to less than
±
5V, with a
common-mode of
±
6V. That these two quantities interact cannot be
overlooked. For instance, with both inputs at
±
4V the common-mode
restriction is satisfied. If V
REF
is now left at +4V the signal input may
not be taken more than 1V below ground because the differential
signal becomes 5V.
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| EPF10K40RC208-4 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 288 LABs 147 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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| EPF10K40RC240-4N | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 288 LABs 189 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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