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参数资料
| 型号： | EVAL-AD5425EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 16/25页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD5425 |
| 产品培训模块： | DAC Architectures |
| 标准包装： | 1 |
| DAC 的数量： | 1 |
| 位数： | 8 |
| 采样率（每秒）： | 2.47M |
| 数据接口： | 串行 |
| 设置时间： | 15ns |
| DAC 型： | 电流 |
| 工作温度： | -40°C ~ 125°C |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | AD5425 |
| 相关产品： | AD5425YRMZ-REEL7-ND - IC DAC 8BIT MULTIPLYING 10MSOP AD5425YRMZ-REEL-ND - IC DAC 8BIT MULTIPLYING 10MSOP AD5425YRMZ-ND - IC DAC 8BIT MULTIPLYING 10MSOP AD5425YRM-REEL7-ND - IC DAC 8BIT MULTIPLYING 10-MSOP AD5425YRM-REEL-ND - IC DAC 8BIT MULTIPLYING 10-MSOP AD5425YRM-ND - IC DAC MULTIPLYING 8BIT 10-MSOP |
AD5425
Data Sheet
Rev. C | Page 22 of 24
PCB LAYOUT AND POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful consider-
ation of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD5425 is mounted should be designed so that the
analog and digital sections are separated and confined to
certain areas of the board. If the DAC is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close as possible to the device.
These DACs should have an ample supply bypassing of 10 F in
parallel with 0.1 F on the supply and located as close to the
package as possible—ideally up against the device. The 0.1 F
capacitor should have low effective series resistance (ESR) and
effective series inductance (ESI), such as found in the common
ceramic types that provide a low impedance path to ground at
high frequencies, to handle transient currents due to internal
logic switching. Low ESR, 1 F to 10 F tantalum or electrolytic
capacitors should also be applied at the supplies to minimize
transient disturbance and to filter out low frequency ripple.
Fast switching signals such as clocks should be shielded with
digital ground to avoid radiating noise to other parts of the
board and should never be run near the reference inputs.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough through the
board. A microstrip technique is by far the best, but not always
possible with a double-sided board. In this technique, the
component side of the board is dedicated to ground plane while
signal traces are placed on the solder side.
It is good practice to employ compact, minimum lead length
PCB layout design. Leads to the input should be as short as
possible to minimize IR drops and stray inductance.
The PCB metal traces between VREF and RFB should also be
matched to minimize gain error. To maximize high frequency
performance, the I-to-V amplifier should be located as close to
the device as possible.
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