参数资料
型号: EVAL-AD5425EBZ
厂商: Analog Devices Inc
文件页数: 2/25页
文件大小: 0K
描述: BOARD EVALUATION FOR AD5425
产品培训模块: DAC Architectures
标准包装: 1
DAC 的数量: 1
位数: 8
采样率(每秒): 2.47M
数据接口: 串行
设置时间: 15ns
DAC 型: 电流
工作温度: -40°C ~ 125°C
已供物品: 板,CD
已用 IC / 零件: AD5425
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Data Sheet
AD5425
Rev. C | Page 9 of 24
Figure 10. Linearity vs. VBIAS Voltage Applied to IOUT2
Figure 11. Gain and Offset Errors vs. VBIAS Voltage Applied to IOUT2
Figure 12. Linearity vs. VBIAS Voltage Applied to IOUT2
Figure 13. Gain and Offset Errors vs. Voltage Applied to IOUT2
Figure 14. Gain and Offset Errors vs. VBIAS Voltage Applied to IOUT2
Figure 15. Linearity vs. VBIAS Voltage Applied to IOUT2
03161-010
VBIAS (V)
1.5
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
LSBs
0.5
0.3
0.1
–0.1
–0.3
–0.5
MAX INL
MIN INL
MAX DNL
MIN DNL
TA = 25°C
VDD = 3V
VREF = 0V
03161-011
VBIAS (V)
1.5
0.5
1.0
VOLTAGE
(mV)
1.4
0.8
1.0
1.2
0.4
0.6
0
0.2
–0.2
–0.4
GAIN ERROR
OFFSET ERROR
TA = 25°C
VDD = 3V
VREF = 0V
03161-012
VBIAS (V)
2.5
0.5
1.0
1.5
2.0
LSBs
0.5
0.3
–0.1
0.1
–0.3
–0.5
MAX INL
MIN INL
MAX DNL
MIN DNL
VDD = 5V
VREF = 0V
03161-013
VBIAS (V)
2.5
0.5
1.0
1.5
2.0
VOLTAGE
(mV)
2.5
2.0
1.5
1.0
0.5
0
–0.5
GAIN ERROR
OFFSET ERROR
VDD = 5V
VREF = 0V
03161-014
VBIAS (V)
2.5
0
0.5
1.0
1.5
2.0
VOLTAGE
(mV)
10.0
6.0
8.0
2.0
4.0
–2.0
0
–4.0
GAIN ERROR
OFFSET ERROR
TA = 25°C
VDD = 5V
VREF = 2.5V
03161-015
VBIAS (V)
2.0
0
0.5
1.0
1.5
LSBs
1.0
0.4
0.6
0.8
0
0.2
–0.6
–0.4
–0.2
–0.8
–1.0
MAX INL BIAS
MIN INL BIAS
TA = 25°C
VDD = 5V
VREF = 2.5V
MAX DNL BIAS
MIN DNL BIAS
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