- 您现在的位置：买卖IC网 > PDF目录17045 > EVAL-AD7492SDZ (Analog Devices Inc)BOARD EVAL FOR AD7492 PDF资料下载
参数资料
| 型号： | EVAL-AD7492SDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/24页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7492 |
| 标准包装： | 1 |
| 系列： | * |
AD7492
Rev. A | Page 19 of 24
ADSP-21065Lto AD7492 Interface
Figure 30 shows a typical interface between the AD7492 and the
ADSP-21065L SHARC processor. This interface is an example
of one of three DMA handshake modes. The MSX control line is
actually three memory select lines. Internal ADDR25–24 are
decoded into MS3-0, these lines are then asserted as chip selects.
The DMAR1 (DMA Request 1) is used in this setup as the
interrupt to signal end of conversion. The rest of the interface is
standard handshaking operation.
AD7492
ADDRESS BUS
DATA BUS
1ADDITIONAL PINS OMITTED FOR CLARITY.
OPTIONAL
ADDRESS
DECODER
ADDRESS
LATCH
ADDRESS
BUS
ADSP-21065L1
ADDR0 TO
ADDR23
MSX
DMAR1
RD
BUSY
DB0 TO DB9
(DB11)
CONVST
CS
RD
D0 TO 31
01
128
-03
0
Figure 30. ADSP-21065L to AD7492 Interface
TMS320C25 to AD7492 Interface
Figure 31 shows an interface between the AD7492 and the
TMS320C25. The CONVST signal can be applied from the
TMS320C25 or from an external source. The BUSY line
interrupts the digital signal processor when conversion is
completed. The TMS320C25 does not have a separate RD
output to drive the AD7492 RD input directly. This has to be
generated from the processor STRB and R/W outputs with the
addition of some glue logic. The RD signal is OR-gated with the
MSC signal to provide the WAIT state required in the read cycle
for correct interface timing. The following instruction is used to
read the conversion from the AD7492:
IN D,ADC
where:
D is the data memory address.
ADC is the AD7492 address.
The read operation must not be attempted during conversion.
ADDRESS BUS
1ADDITIONAL PINS OMITTED FOR CLARITY.
OPTIONAL
DATA BUS
TMS320C251
IS
STRB
READY
MSC
R/W
AD7492
ADDRESS
DECODER
BUSY
DB0 TO DB9
(DB11)
CONVST
CS
RD
DMD0 TO DMD15
A0 TO A15
01
12
8-
03
1
Figure 31. TMS320C25 to AD7492 Interface
PIC17C4x to AD7492 Interface
Figure 32 shows a typical parallel interface between the AD7492
and PIC17C4x. The microcontroller sees the ADC as another
memory device with its own specific memory address on the
memory map. The CONVST signal can be controlled by either
the microcontroller or an external source. The BUSY signal
provides an interrupt request to the microcontroller when a
conversion ends. The INT pin on the PIC17C4x must be
configured to be active on the negative edge. Port C and Port D
of the microcontroller are bidirectional and used to address the
AD7492 and to read in the 12-bit data. The OE pin on the PIC
can be used to enable the output buffers on the AD7492 and
perform a read operation.
1ADDITIONAL PINS OMITTED FOR CLARITY.
OPTIONAL
PIC17C4x1
OE
INT
ALE
AD7492
ADDRESS
LATCH
BUSY
DB0 TO DB9
(DB11)
CONVST
CS
RD
ADDRESS
DECODER
01128
-032
AD0 TO AD15
Figure 32. PIC17C4x to AD7492 Interface
相关PDF资料 |
PDF描述 |
|---|---|
| REC5-483.3SRW/H6/A | CONV DC/DC 5W 36-72VIN 3.3VOUT |
| PH50S280-24 | DC-DC CONVERTER 150W 15V OUTPUT |
| PH50S24-5 | CONV 50W 24V IN 5V OUT DC-DC |
| B82422A3390K100 | INDUCTOR .039UH 530MA 1210 10% |
| VE-BWD-EY | CONVERTER MOD DC/DC 85V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EVAL-AD7495CB | 制造商:Analog Devices 功能描述:EVAL BD EVAL BDS FOR 1 MSPS, 12-BIT ADC - Bulk |
| EVAL-AD7495CB3 | 制造商:AD 制造商全称:Analog Devices 功能描述:1 MSPS, 12-Bit ADCs |
| EVAL-AD7495CB4 | 制造商:AD 制造商全称:Analog Devices 功能描述:1MSPS,12-Bit ADCs |
| EVAL-AD7606-4EDZ | 功能描述:EVAL BOARD FOR AD7606 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
| EVAL-AD7606-6EDZ | 功能描述:EVAL BOARD FOR AD7606 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
发布紧急采购，3分钟左右您将得到回复。