参数资料
型号: EVAL-AD7760EDZ
厂商: Analog Devices Inc
文件页数: 1/37页
文件大小: 0K
描述: BOARD EVAL CONTROL AD7760
标准包装: 1
ADC 的数量: 1
位数: 24
采样率(每秒): 2.5M
数据接口: 并联
输入范围: ±3.25 Vpp
在以下条件下的电源(标准): 958mW @ 2.5MSPS
工作温度: -40°C ~ 85°C
已用 IC / 零件: AD7760
已供物品: 板,CD
2.5 MSPS, 24-Bit, 100 dB
Sigma-Delta ADC with On-Chip Buffer
AD7760
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
FEATURES
120 dB dynamic range at 78 kHz output data rate
100 dB dynamic range at 2.5 MHz output data rate
112 dB SNR at 78 kHz output data rate
100 dB SNR at 2.5 MHz output data rate
2.5 MHz maximum fully filtered output word rate
Programmable oversampling rate (8× to 256×)
Fully differential modulator input
On-chip differential amplifier for signal buffering
Low-pass finite impulse response (FIR) filter with default or
user-programmable coefficients
Modulator output mode
Overrange alert bit
Digital offset and gain correction registers
Filter bypass modes
Low power and power-down modes
Synchronization of multiple devices via SYNC pin
APPLICATIONS
Data acquisition systems
Vibration analysis
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
AD7760
VIN+
VIN
AVDD1
AGND
MCLK
DGND
VDRIVE
AVDD2
AVDD3
AVDD4
DVDD
DECAPA/B
RBIAS
DB0 TO DB15
CS
DRDY
RD/WR
CONTROL LOGIC
I/O
OFFSET AND GAIN
REGISTERS
DIFF
MULTIBIT
Σ-Δ
MODULATOR
RECONSTRUCTION
VREF+
FIR FILTER
ENGINE
PROGRAMMABLE
DECIMATION
BUF
SYNC
RESET
0
4975-
001
Figure 1.
GENERAL DESCRIPTION
The AD7760 is a high performance, 24-bit Σ-Δ analog-to-digital
converter (ADC). It combines wide input bandwidth and high
speed with the benefits of Σ-Δ conversion to achieve a perfor-
mance of 100 dB SNR at 2.5 MSPS, making it ideal for high
speed data acquisition. Wide dynamic range combined with
significantly reduced antialiasing requirements simplify the
design process. An integrated buffer to drive the reference, a
differential amplifier for signal buffering and level shifting, an
overrange flag, internal gain and offset registers, and a low-pass
digital FIR filter make the AD7760 a compact, highly integrated
data acquisition device requiring minimal peripheral component
selection. In addition, the device offers programmable decimation
rates, and the digital FIR filter can be adjusted if the default
characteristics are not appropriate for the application. The
AD7760 is ideal for applications demanding high SNR
without a complex front-end signal processing design.
The differential input is sampled at up to 40 MSPS by an analog
modulator. The modulator output is processed by a series of low-
pass filters, with the final filter having default or user-programmable
coefficients. The sample rate, filter corner frequencies, and output
word rate are set by a combination of the external clock frequency
and the configuration registers of the AD7760.
The reference voltage supplied to the AD7760 determines the
analog input range. With a 4 V reference, the analog input range
is ±3.2 V differential biased around a common mode of 2 V.
This common-mode biasing can be achieved using the on-chip
differential amplifier, further reducing the external signal
conditioning requirements.
The AD7760 is available in an exposed paddle, 64-lead TQFP
and is specified over the industrial temperature range from
40°C to +85°C.
Table 1. Related Devices
Part No.
Description
24-bit, 625 kSPS, 109 dB, Σ-Δ parallel interface
24-bit, 625 kSPS, 109 dB, Σ-Δ serial interface
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