参数资料
型号: EVAL-ADAV801EBZ
厂商: Analog Devices Inc
文件页数: 29/60页
文件大小: 0K
描述: BOARD EVALUATION FOR ADAV801
标准包装: 1
主要目的: 接口,模拟前端(AFE)
已用 IC / 零件: ADAV801
已供物品:
相关产品: ADAV801ASTZ-ND - IC CODEC AUDIO R-DVD 3.3V 64LQFP
ADAV801ASTZ-REEL-ND - IC CODEC AUDIO R-DVD 3.3V 64LQFP
ADAV801
Rev. A | Page 35 of 60
Receiver Configuration 2—Address 0001010 (0x0A)
Table 33. Receiver Configuration 2 Register Bit Map
7
6
5
4
3
2
1
0
RxMUTE
SP_PLL
SP_PLL_ SEL1
SP_PLL_ SEL0
Reserved
NO NONAUDIO
NO_VALIDITY
Table 34. Receiver Configuration 2 Register Bit Descriptions
Bit Name
Description
RxMUTE
Hard-mutes the audio output for the AES3/S/PDIF receiver.
0 = AES3/S/PDIF receiver is not muted.
1 = AES3/S/PDIF receiver is muted.
SP_PLL
AES3/S/PDIF receiver PLL accepts a left/right clock from one of the four serial ports as the PLL reference clock.
0 = Left/right clock generated from the AES3/S/PDIF preambles is the reference clock to the PLL.
1 = Left/right clock from one of the serial ports is the reference clock to the PLL.
SP_PLL_SEL[1:0]
Selects one of the four serial ports as the reference clock to the PLL when SP_PLL is set.
00 = Playback port is selected.
01 = Auxiliary input port is selected.
10 = Record port is selected.
11 = Auxiliary output port is selected.
NO NONAUDIO
When the NO NONAUDIO bit is set, data from the AES3/S/PDIF receiver is not allowed into the sample rate converter
(SRC). If the NO NONAUDIO data is due to DTS, AAC, and so on, as defined by the IEC61937 standard, then the data
from the AES3/S/PDIF receiver is not allowed into the SRC regardless of the state of this bit.
0 = AES3/S/PDIF receiver data is sent to the SRC.
1 = Data from the AES3/S/PDIF receiver is not allowed into the SRC, if the NO NONAUDIO bit is set.
NO_VALIDITY
When the NO_VALIDITY bit is set, data from the AES3/S/PDIF receiver is not allowed into the SRC.
0 = AES3/S/PDIF receiver data is sent to the SRC.
1 = Data from the AES3/S/PDIF receiver is not allowed into the SRC, if the NO_VALIDITY bit is set.
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