参数资料
型号: EVAL-ADUC831QSZ
厂商: Analog Devices Inc
文件页数: 2/76页
文件大小: 0K
描述: KIT DEV FOR ADUC831 QUICK START
产品培训模块: Process Control
标准包装: 1
系列: QuickStart™ 套件
类型: MCU
适用于相关产品: ADuC831
所含物品: 评估板、电源、缆线、软件和说明文档
产品目录页面: 739 (CN2011-ZH PDF)
相关产品: ADUC831BCPZ-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP
ADUC831BCPZ-REEL-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP
ADUC831BSZ-REEL-ND - IC MCU 62K FLASH ADC/DAC 52MQFP
ADUC831BSZ-ND - IC ADC/DAC 12BIT W/MCU 52-MQFP
其它名称: EVAL-ADUC831QS
EVAL-ADUC831QS-ND
REV. 0
–10–
ADuC831
TERMINOLOGY
ADC SPECIFICATIONS
Integral Nonlinearity
This is the maximum deviation of any code from a straight line
passing through the endpoints of the ADC transfer function.
The endpoints of the transfer function are zero scale, a point
1/2 LSB below the first code transition and full scale, a point
1/2 LSB above the last code transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (0000 . . . 000)
to (0000 . . . 001) from the ideal, i.e., +1/2 LSB.
Gain Error
This is the deviation of the last code transition from the ideal
AIN voltage (Full Scale – 1.5 LSB) after the offset error has
been adjusted out.
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the ADC. The signal is the rms amplitude of the fun-
damental. Noise is the rms sum of all nonfundamental signals up
to half the sampling frequency (fS/2), excluding dc. The ratio is
dependent upon the number of quantization levels in the digiti-
zation process; the more levels, the smaller the quantization
noise. The theoretical signal to (noise + distortion) ratio for an
ideal N-bit converter with a sine wave input is given by:
Signal to(Noise
Distortion)= (6.02N + 1.76) dB
+
Thus for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion
Total Harmonic Distortion is the ratio of the rms sum of the
harmonics to the fundamental.
DAC SPECIFICATIONS
Relative Accuracy
Relative accuracy or endpoint linearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
adjusting for zero error and full-scale error.
Voltage Output Settling Time
This is the amount of time it takes for the output to settle to a
specified level for a full-scale input change.
Digital-to-Analog Glitch Impulse
This is the amount of charge injected into the analog output
when the inputs change state. It is specified as the area of the
glitch in nV sec.
PIN FUNCTION DESCRIPTIONS (continued)
Mnemonic
Type
Function
PSEN
OProgram Store Enable, Logic Output. This output is a control signal that enables the external program
memory to the bus during external fetch operations. It is active every six oscillator periods except during
external data memory accesses. This pin remains high during internal program execution.
PSEN can also be
used to enable serial download mode when pulled low through a resistor on power-up or RESET.
ALE
O
Address Latch Enable, Logic Output. This output is used to latch the low byte (and page byte for 24-bit
address space accesses) of the address into external memory during normal operation. It is activated every
six oscillator periods except during an external data memory access.
EA
IExternal Access Enable, Logic Input. When held high, this input enables the device to fetch code from
internal program memory locations 0000H to 1FFFH. When held low this input enables the device to fetch
all instructions from external program memory. This pin should not be left floating.
P0.7–P0.0
I/O
Port 0 is an 8-bit Open Drain Bidirectional I/O port. Port 0 pins that have 1s written to them float, and in
(A0–A7)
that state can be used as high impedance inputs. Port 0 is also the multiplexed low order address and data
bus during accesses to external program or data memory. In this application it uses strong internal pull-ups
when emitting 1s.
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