参数资料
型号: EVAL-ADUC831QSZ
厂商: Analog Devices Inc
文件页数: 3/76页
文件大小: 0K
描述: KIT DEV FOR ADUC831 QUICK START
产品培训模块: Process Control
标准包装: 1
系列: QuickStart™ 套件
类型: MCU
适用于相关产品: ADuC831
所含物品: 评估板、电源、缆线、软件和说明文档
产品目录页面: 739 (CN2011-ZH PDF)
相关产品: ADUC831BCPZ-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP
ADUC831BCPZ-REEL-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP
ADUC831BSZ-REEL-ND - IC MCU 62K FLASH ADC/DAC 52MQFP
ADUC831BSZ-ND - IC ADC/DAC 12BIT W/MCU 52-MQFP
其它名称: EVAL-ADUC831QS
EVAL-ADUC831QS-ND
REV. 0
Typical Performance Characteristics–ADuC831
–11–
The typical performance plots presented in this section illustrate
typical performance of the ADuC831 under various operating
conditions.
TPC 1 and TPC 2 below show typical ADC Integral Nonlinearity
(INL) errors from ADC code 0 to code 4095 at 5 V and 3 V
supplies respectively. The ADC is using its internal reference
(2.5 V) and operating at a sampling rate of 152 kHz and the
typically worst-case errors in both plots is just less than 0.3 LSBs.
TPC 3 and TPC 4 below show the variation in Worst Case
Positive (WCP) INL and Worst Case Negative (WCN) INL
versus external reference input voltage.
TPC 5 and TPC 6 show typical ADC differential nonlinearity
(DNL) errors from ADC code 0 to code 4095 at 5 V and 3 V sup-
plies, respectively. The ADC is using its internal reference (2. V) and
operating at a sampling rate of 152 kHz and the typically worst case
errors in both plots is just less than 0.2 LSBs.
TPC 7 and TPC 8 show the variation in worst case positive
(WCP) DNL and worst-case negative (WCN) DNL versus
external reference input voltage.
TPC 9 shows a histogram plot of 10,000 ADC conversion
results on a dc input with VDD = 5 V. The plot illustrates an
excellent code distribution pointing to the low noise perfor-
mance of the on-chip precision ADC.
TPC 10 shows a histogram plot of 10,000 ADC conversion
results on a dc input for VDD = 3 V. The plot again illustrates a
very tight code distribution of 1 LSB with the majority of codes
appearing in one output bin.
TPC 11 and TPC 12 show typical FFT plots for the ADuC831.
These plots were generated using an external clock input. The
ADC is using its internal reference (2.5 V) sampling a full-scale,
10 kHz sine wave test tone input at a sampling rate of 149.79 kHz.
The resultant FFTs shown at 5 V and 3 V supplies illustrate an
excellent 100 dB noise floor, 71 dB Signal-to-Noise Ratio (SNR)
and THD greater than –80 dB.
TPC 13 and TPC 14 show typical dynamic performance versus
external reference voltages. Again excellent ac performance can
be observed in both plots with some roll-off being observed as
VREF falls below 1 V.
TPC 15 shows typical dynamic performance versus sampling
frequency. SNR levels of 71 dBs are obtained across the sam-
pling range of the ADuC831.
TPC 16 shows the voltage output of the on-chip temperature
sensor versus temperature. Although the initial voltage output at
25C can vary from part to part, the resulting slope of
–2 mV/C is constant across all parts.
ADC CODES
–1.0
0
511
LSBs
1023
2047
2559
3071
–0.8
1535
3583
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
AVDD / DVDD = 5V
fS = 152kHz
4095
TPC 1. Typical INL Error, VDD = 5 V
ADC CODES
1.0
511
1023
1535
2047
2559
LSBs
0.6
0.2
–0.2
–0.6
–1.0
0.8
0.4
0
–0.4
–0.8
3071
3583
0
4095
AVDD/DVDD = 3V
f
S = 152kHz
TPC 2. Typical INL Error, VDD = 3 V
EXTERNAL REFERENCE – V
1.2
WCP–INL
LSBs
0.8
0.4
0
–0.4
–0.6
1.0
0.6
0.2
–0.2
AVDD/DVDD = 5V
f
S = 152kHz
0.5
1.0
1.5
2.0
2.5
5.0
0.6
0.4
0
–0.4
–0.6
0.2
–0.2
WCN–INL
LSBs
WCN INL
WCP INL
TPC 3. Typical Worst Case INL Error vs. VREF, VDD = 5 V
EXTERNAL REFERENCE – V
WCP–INL
LSBs
0.8
0.4
0
–0.4
–0.8
0.6
0.2
–0.2
AVDD/DVDD = 3V
f
S = 152kHz
0.5
1.5
2.5
WCN–INL
LSBs
–0.6
0.8
0.4
0
–0.4
–0.8
0.6
0.2
–0.2
–0.6
3.0
2.0
1.0
WCN INL
WCP INL
TPC 4. Typical Worst Case INL Error vs. VREF, VDD = 3 V
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