eX FPGA Architecture and Characteristics
1-20
Revision 10
The estimation of the dynamic power dissipation is a piece-wise linear summation of the power
dissipation of each component.
Dynamic power dissipation = VCCA2 * [(mc * Ceqcm * fmC)Comb Modules + (ms * Ceqsm * fmS)Seq Modules
+ (n * Ceqi * fn)Input Buffers + (0.5 * (q1 * Ceqcr * fq1) + (r1 * fq1))RCLKA + (0.5 * (q2 * Ceqcr * fq2)
+ (r2 * fq2))RCLKB + (0.5 * (s1 * Ceqhv * fs1)+(Ceqhf * fs1))HCLK] + VCCI2 * [(p * (Ceqo + CL)
* fp)Output Buffers]
where:
The eX, SX-A and RTSX-S Power Calculator can be used to estimate the total power dissipation (static
mc
= Number of combinatorial cells switching at frequency fm, typically 20% of C-cells
ms
= Number of sequential cells switching at frequency fm, typically 20% of R-cells
n
= Number of input buffers switching at frequency fn, typically number of inputs / 4
p
= Number of output buffers switching at frequency fp, typically number of outputs / 4
q1
= Number of R-cells driven by routed array clock A
q2
= Number of R-cells driven by routed array clock B
r1
= Fixed capacitance due to routed array clock A
r2
= Fixed capacitance due to routed array clock B
s1
= Number of R-cells driven by dedicated array clock
Ceqcm = Equivalent capacitance of combinatorial modules
Ceqsm = Equivalent capacitance of sequential modules
Ceqi
= Equivalent capacitance of input buffers
Ceqcr = Equivalent capacitance of routed array clocks
Ceqhv = Variable capacitance of dedicated array clock
Ceqhf = Fixed capacitance of dedicated array clock
Ceqo
= Equivalent capacitance of output buffers
CL
= Average output loading capacitance, typically 10 pF
fmc
= Average C-cell switching frequency, typically F/10
fms
= Average R-cell switching frequency, typically F/10
fn
= Average input buffer switching frequency, typically F/5
fp
= Average output buffer switching frequency, typically F/5
fq1
= Frequency of routed clock A
fq2
= Frequency of routed clock B
fs1
= Frequency of dedicated array clock