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参数资料
| 型号： | FAN5904UC01X |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 3/23页 |
| 文件大小： | 0K |
| 描述： | IC CONV BUCK W/BYPASS 16-WLCSP |
| 标准包装： | 1 |
| 应用： | 转换器，3G，3.5G，4G RF 功率放大器 |
| 输入电压： | 2.7 V ~ 5.5 V |
| 输出数： | 1 |
| 输出电压： | 0.4 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-UFBGA，WLCSP |
| 供应商设备封装： | 16-WLCSP |
| 包装： | 标准包装 |
| 其它名称： | FAN5904UC01XFSDKR |
Pin Configuration
Figure 3. Bumps Face Down – Top-Through View
Pin Definitions
Figure 4. Bumps Face Up
Pin #
C1
A4, B4
D4
C2
D2
D1
C3
C4
D3
A3, B3
A2, B2
A1, B1
Name
AGND
FB
FB_SNS
EN
VCON
AVIN
BPEN
SYNC
MODE
PVIN
SW
PGND
Description
Analog ground, reference ground for the IC. Follow PCB routing notes for connecting this pin.
Output voltage sense pin. Connect to V OUT to establish feedback path for regulation point. Connect
together on PCB.
Feedback Sense pin. Connect to FB pins on PCB.
Enables switcher when HIGH; Shutdown Mode when LOW. This pin should not be left floating.
Analog control pin. Shield signal routing against noise.
Analog supply voltage input. Connect to PVIN.
Force bypass when HIGH; Auto bypass when LOW. This pin should not be left floating.
External clock synchronization input. When SYNC is HIGH, the DC-DC does not allow PFM Mode.
Tie SYNC to AGND if not used or in Auto-PFM Mode. This pin should not be left floating.
Low-Power Auto Mode / High-Power PWM Mode select. When MODE = 1, the DC-DC is
configured for 6MHz Low-Power Auto Mode. When MODE = 0, the DC-DC is configured for 3MHz
High-Power PWM Mode. This pin should not be left floating.
Supply voltage input to the internal MOSFET switches. Connect to input power source.
Switching node of the internal MOSFET switches. Connect to output inductor.
Power ground of the internal MOSFET switches. Follow routing notes for connections between
PGND and AGND.
? 2011 Fairchild Semiconductor Corporation
FAN5904 ? Rev. 3.0.7
3
www.fairchildsemi.com
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