参数资料
型号: FAN5904UC01X
厂商: Fairchild Semiconductor
文件页数: 7/23页
文件大小: 0K
描述: IC CONV BUCK W/BYPASS 16-WLCSP
标准包装: 1
应用: 转换器,3G,3.5G,4G RF 功率放大器
输入电压: 2.7 V ~ 5.5 V
输出数: 1
输出电压: 0.4 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-UFBGA,WLCSP
供应商设备封装: 16-WLCSP
包装: 标准包装
其它名称: FAN5904UC01XFSDKR
Electrical Characteristics, High-Power PWM Mode (MODE = 0)
V IN = V OUT + 0.6 V, I OUT = 200 mA, EN = V IN , T A = -40°C to +85°C, unless otherwise noted. Typical values are at T A = +25°C
and V IN = 3.7 V.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Unit
Oscillator / Synchronization
f SW
Average Oscillator Frequency
2.7
3.0
3.3
MHz
f SYNC
Synchronization Frequency Range
(7)
2.4
3.0
3.6
MHz
DC-DC
R DSON
PMOS On Resistance
NMOS On Resistance
V IN = V GS = 3.7 V
V IN = V GS = 3.7 V
105
60
m ?
m ?
I LIMp
I LIMn
P-Channel Current Limit
N-Channel Current Limit
2.7
1.0
3.3
1.3
3.9
1.7
A
A
V OUT_MIN
Minimum Output Voltage
V CON = 0.16 V
0.35
0.40
0.45
V
V OUT_MAX Maximum Output Voltage
V CON = 1.40 V
3.45
3.50
3.55
V
DC-DC Efficiency
η Power
Power Efficiency,
High-Power Auto Mode, V IN = 3.7 V
V OUT = 3.3 V, I LOAD = 1.6 A
V OUT = 2.0 V, I LOAD = 0.2 A
92
88
%
Output Regulation
V OUT_RLine V OUT Line Regulation
V OUT_RLoad V OUT Load Regulation
V BYPSLEW V OUT Slew Rate
3.1 ≤ V IN ≤ 3.7
20 mA ≤ I OUT ≤ 2000 mA
During Bypass Enabling
+5
+25
0.25
mV
mV
V/μs
V BP_ThH
V BP_ThL
Voltage Threshold to Enter Bypass
Voltage Threshold to Exit Bypass
V IN – V PMOS – V OUT
V IN – V OUT
295
550
340
650
385
750
mV
mV
V OUT_Ripple V OUT Ripple
(7)
PWM Mode, V IN = 3.8 V
4
mV
Timing
t SS
t DC-DC_TR
t DC-DC_TF
t DC-DC_TR
t DC-DC_TF
t DC-DC_CL
t DCDC_CLR
Startup Time
V OUT Step Response Rise Time (8)
V OUT Step Response Fall Time (8)
V OUT Step Response Rise Time (8)
V OUT Step Response Fall Time (8)
Maximum Allowed Time for
Consecutive Current Limits (9)
Consecutive Current Limit Recovery
Time (4)
V IN = 3.7 V, V OUT from 0 V to
3.1 V, C OUT = 2 x 4.7 μF, 10 V,
X5R
V OUT from 5% to 95%, ? V OUT <
1.5 V (0.5 V – 2.0 V), R LOAD ≤ 7 ?
V OUT from 95% to 5%, ? V OUT <
1.5 V (2.0 V – 0.5 V), R LOAD ≤ 7 ?
V OUT from 5% to 95%, ? V OUT <
3.0 V (0.4 V – 3.4 V), R LOAD ≤ 7 ?
V OUT from 95% to 5%, ? V OUT <
3.0 V (3.4 V – 0.4 V), R LOAD ≤ 7 ?
50
40
180
60
10
10
10
12
μs
μs
μs
μs
μs
μs
μs
Notes:
7. Guaranteed by design; not tested in production.
8. Guaranteed by design; not tested in production. Voltage transient only. Maximum specified V OUT transition step is 3.1 V.
Assumes C OUT = 2 x 4.7 μF.
9. Protects part under short-circuit conditions. Under heavy capacitive loads, V CON slew rate may be adjusted to avoid
consecutive current limits. Under typical conditions for a 3 V change at the output, a capacitive only load of up to 40 μF is
supported (assuming a step at the V CON input).
? 2011 Fairchild Semiconductor Corporation
FAN5904 ? Rev. 3.0.7
7
www.fairchildsemi.com
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