参数资料
型号: FDB86102LZ
厂商: Fairchild Semiconductor
文件页数: 4/6页
文件大小: 0K
描述: MOSFET N-CH 100V 30A D2PAK
标准包装: 800
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 100V
电流 - 连续漏极(Id) @ 25° C: 30A
开态Rds(最大)@ Id, Vgs @ 25° C: 24 毫欧 @ 8.3A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 21nC @ 10V
输入电容 (Ciss) @ Vds: 1275pF @ 50V
功率 - 最大: 3.1W
安装类型: 表面贴装
封装/外壳: TO-263-3,D²Pak(2 引线+接片),TO-263AB
供应商设备封装: TO-263
包装: 带卷 (TR)
Typical Characteristics T J = 25°C unless otherwise noted
10
8
I D = 8.3 A
V DD = 25 V
10000
1000
C iss
6
V DD = 50 V
100
C oss
4
2
V DD = 75 V
10
f = 1 MHz
V GS = 0 V
C rss
0
0
5
10
15
20
1
0.1
1
10
100
10
Q g , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
40
-1
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance vs Drain
to Source Voltage
10
10
-2
-3
V GS = 0 V
10
10
10
10
10
10
10
T J = 25 o C
T J = 100 o C
T J = 125 o C
-4
-5
-6
-7
-8
-9
T J = 125 o C
T J = 25 o C
10
1
0.001
0.01
0.1
1
10
100
-10
0
3
6
9
12
15
18 21
24
27
30
33
40
t AV , TIME IN AVALANCHE (ms)
Figure 9. Unclamped Inductive
Switching Capability
V GS , GATE TO SOURCE VOLTAGE (V)
Figure 10. Gate Leakage Cuurent vs Gate to
Source Voltage
100
30
V GS = 10 V
10
10 ms
20
V GS = 4.5 V
1
THIS AREA IS
LIMITED BY r DS(on)
100 ms
1s
10 s
SINGLE PULSE
DC
R θ JC = 1.9 C/W
10
0
o
0.1
0.01
T J = MAX RATED
R θ JC = 1.9 o C/W
T C = 25 o C
25
50
75
100
125
150
0.1
1
10
100
T C , CASE TEMPERATURE ( C )
o
Figure 11. Maximum Continuous Drain
Current vs Case Temperature
V DS , DRAIN to SOURCE VOLTAGE (V)
Figure 12. Forward Bias Safe Operating Area
?2011 Fairchild Semiconductor Corporation
FDB86102LZ Rev.C1
4
www.fairchildsemi.com
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