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| 型号： | FDD8453LZ |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/7页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 40V 16.4A DPAK |
| 产品目录绘图： | DPAK, TO-252(AA) |
| 标准包装： | 1 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 40V |
| 电流 - 连续漏极(Id) @ 25° C： | 16.4A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 6.7 毫欧 @ 15A，10V |
| Id 时的 Vgs(th)（最大）： | 3V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 64nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 3515pF @ 20V |
| 功率 - 最大： | 3.1W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | TO-252-3，DPak（2 引线+接片），SC-63 |
| 供应商设备封装： | D-Pak |
| 包装： | 标准包装 |
| 产品目录页面： | 1605 (CN2011-ZH PDF) |
| 其它名称： | FDD8453LZDKR |
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
? BV DS S
? T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0V
I D = 250 μ A, referenced to 25°C
V DS = 32V, V GS = 0V
V GS = ±20V, V DS = 0V
40
36
1
±10
V
mV / °C
μ A
μ A
On Characteristics
V GS(th)
? V GS(th )
? T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25°C
1.0
1.8
-6.0
3.0
V
mV/°C
V GS = 10V, I D = 15A
5.8
6.7
r DS(on)
g FS
Static Drain to Source On Resistance
Forward Transconductance
V GS = 4.5V, I D = 13A
V GS = 10V, I D = 15A,
T J = 125°C
V DS = 5V, I D = 15A
6.8
9.1
77
8.7
10.6
m ?
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 20V, V GS = 0V,
f = 1MHz
f = 1MHz
2640
320
190
2.3
3515
425
285
pF
pF
pF
?
Switching Characteristics
t d(on)
t r
t d(off)
t f
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
V DD = 20V, I D = 15A,
V GS = 10V, R GEN = 6 ?
11
6
37
5
19
12
58
10
ns
ns
ns
ns
Q g
Q g
Q gs
Total Gate Charge
Total Gate Charge
Gate to Source Charge
V GS = 0V to 10V
V GS = 0V to 5V
V DD = 20V,
I D = 15A
46
24
7
64
33
nC
nC
nC
Q gd
Gate to Drain “Miller” Charge
8
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage
V GS = 0V, I S = 2.0A
V GS = 0V, I S = 15A
(Note 2)
(Note 2)
0.7
0.8
1.2
1.3
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = 15A, di/dt = 100A/ μ s
25
20
40
32
ns
nC
Notes :
1: R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R θ JC is guaranteed by design while R θ JA is determined by the user’s board design.
a) 40°C/W when mounted on a
1 in 2 pad of 2 oz copper
b) 96°C/W when mounted
on a minimum pad.
2: Pulse Test: Pulse Width < 30 0 μ s, Duty cycle < 2.0%.
3: Starting T J = 25 ° C , L = 3mH , I AS = 13A , V DD = 40V , V GS = 10V.
4: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
?2007 Fairchild Semiconductor Corporation
FDD8453LZ Rev.C
2
www.fairchildsemi.com
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