参数资料
型号: FDG6318P
厂商: Fairchild Semiconductor
文件页数: 1/5页
文件大小: 0K
描述: MOSFET P-CH DUAL 20V SC70-6
产品培训模块: High Voltage Switches for Power Processing
产品变化通告: Mold Compound Change 12/Dec/2007
Mold Compound Change 07/May/2008
标准包装: 1
FET 型: 2 个 P 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 20V
电流 - 连续漏极(Id) @ 25° C: 500mA
开态Rds(最大)@ Id, Vgs @ 25° C: 780 毫欧 @ 500mA,4.5V
Id 时的 Vgs(th)(最大): 1.5V @ 250µA
闸电荷(Qg) @ Vgs: 1.2nC @ 4.5V
输入电容 (Ciss) @ Vds: 83pF @ 10V
功率 - 最大: 300mW
安装类型: 表面贴装
封装/外壳: 6-TSSOP,SC-88,SOT-363
供应商设备封装: SC-70-6
包装: 标准包装
其它名称: FDG6318PFSDKR
January 2003
FDG6318P
Dual P-Channel, Digital FET
General Description
Features
These dual P-Channel logic level enhancement mode
MOSFET are produced using Fairchild Semiconductor’s
advanced PowerTrench process that has been
especially tailored to minimize on-state resistance. This
? –0.5 A, –20 V.
R DS(ON) = 780 m ? @ V GS = –4.5 V
R DS(ON) = 1200 m ? @ V GS = –2.5 V
device has been designed especially for low voltage
applications as a replacement for bipolar digital
transistors and small signal MOSFETS.
Applications
? Battery management
S
? Very low level gate drive requirements allowing direct
operation in 3V circuits (V GS(th) < 1.5V).
? Compact industry standard SC70-6 surface mount
package
D
G
S 1 or 4
G 2 or 5
6 or 3 D
5 or 2 G
D
Pin 1
S
G
D 3 or 6
4 or 1 S
SC70-6
The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.
Absolute Maximum Ratings
T A =25 o C unless otherwise noted
Symbol
V DSS
V GSS
Parameter
Drain-Source Voltage
Gate-Source Voltage
Ratings
–20
±12
Units
V
V
I D
Drain Current
– Continuous
(Note 1)
–0.5
A
– Pulsed
–1.8
P D
Power Dissipation for Single Operation
(Note 1)
0.3
W
T J , T STG
Operating and Storage Junction Temperature Range
–55 to +150
° C
Thermal Characteristics
R θ JA
Thermal Resistance, Junction-to-Ambient
(Note 1)
415
° C/W
Package Marking and Ordering Information
Device Marking
.38
Device
FDG6318P
Reel Size
7’’
Tape width
8mm
Quantity
3000 units
? 2003 Fairchild Semiconductor Corporation
FDG6318P Rev C (W)
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