参数资料
型号: FDMC7672
厂商: Fairchild Semiconductor
文件页数: 2/7页
文件大小: 0K
描述: MOSFET N-CH 30V 8-MLP
标准包装: 3,000
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 16.9A
开态Rds(最大)@ Id, Vgs @ 25° C: 5.7 毫欧 @ 16.9A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 57nC @ 10V
输入电容 (Ciss) @ Vds: 3890pF @ 15V
功率 - 最大: 2.3W
安装类型: 表面贴装
封装/外壳: 8-MLP
供应商设备封装: 8-MLP(3.3x3.3)
包装: 管件
Electrical Characteristics T J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Δ BV DS S
Δ T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0 V
I D = 250 μ A, referenced to 25 °C
V DS = 24 V, V GS = 0 V
T J = 125 °C
V GS = 20 V, V DS = 0 V
30
13
1
250
100
V
mV/°C
μ A
nA
On Characteristics
V GS(th)
Δ V GS(th)
Δ T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25 °C
1.2
1.9
-6
3.0
V
mV/°C
V GS = 10 V, I D = 16.9 A
4.3
5.7
r DS(on)
g FS
Static Drain to Source On Resistance
Forward Transconductance
V GS = 4.5 V, I D = 15.0 A
V GS = 10 V, I D = 16.9 A
T J = 125 °C
V DD = 5 V, I D = 16.9 A
5.4
5.5
82
7.0
6.9
m Ω
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 15 V, V GS = 0 V,
f = 1 MHz
2925
1050
80
0.9
3890
1400
120
2.7
pF
pF
pF
Ω
Switching Characteristics
t d(on)
Turn-On Delay Time
13
24
ns
t r
t d(off)
t f
Q g(TOT)
Q gs
Q gd
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Total Gate Charge
Gate to Drain “Miller” Charge
V DD = 15 V, I D = 16.9 A,
V GS = 10 V, R GEN = 6 Ω
V GS = 0 V to 10 V
V GS = 0 V to 4.5 V V DD = 15 V
I D = 16.9 A
6
31
5
40
18
9
4
12
49
10
57
24
ns
ns
ns
nC
nC
nC
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage
V GS = 0 V, I S = 16.9 A
V GS = 0 V, I S = 1.9 A
(Note 2)
(Note 2)
0.83
0.72
1.2
1.2
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = 16.9 A, di/dt = 100 A/ μ s
39
18
62
32
ns
nC
NOTES:
1: R θ JA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R θ JC is guaranteed by design while R θ CA is determined by
the user's board design.
a. 53 °C/W when mounted on
a 1 in 2 pad of 2 oz copper
2: Pulse Test: Pulse Width < 300 μ s, Duty cycle < 2.0 %.
3. E AS of 144 mJ is based on starting T J = 25 o C, L = 1 mH, I AS = 17 A, V DD = 27 V, V GS = 10 V.
b.125 °C/W when mounted on
a minimum pad of 2 oz copper
?2010 Fairchild Semiconductor Corporation
FDMC7672 Rev.C4
2
www.fairchildsemi.com
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