参数资料
型号: FDMQ8403
厂商: Fairchild Semiconductor
文件页数: 4/6页
文件大小: 0K
描述: MOSFET N-CH 100V 6A 12-MLP
标准包装: 1
系列: GreenBridge™ PowerTrench®
FET 型: 4 N 通道(半桥)
FET 特点: 标准
漏极至源极电压(Vdss): 100V
电流 - 连续漏极(Id) @ 25° C: 3.1A
开态Rds(最大)@ Id, Vgs @ 25° C: 110 毫欧 @ 3A,10V
Id 时的 Vgs(th)(最大): 4V @ 250µA
闸电荷(Qg) @ Vgs: 5nC @ 10V
输入电容 (Ciss) @ Vds: 215pF @ 15V
功率 - 最大: 1.9W
安装类型: 表面贴装
封装/外壳: 12-WFDFN 裸露焊盘
供应商设备封装: 12-MLP(5x4.5)
包装: 标准包装
其它名称: FDMQ8403DKR
Typical Characteristics T J = 25 °C unless otherwise noted
10
8
I D = 3 A
V DD = 50 V
1000
6
V DD = 25 V
V DD = 75 V
100
C iss
4
2
10
f = 1 MHz
V GS = 0 V
C oss
C rss
0
1
0
0.5
1.0
1.5
2.0
2.5
3.0
0.1
1
10
100
Q g , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
20
10
100 us
500
100
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance vs Drain
to Source Voltage
1
1 ms
0.1
0.01
THIS AREA IS
LIMITED BY r DS(on)
SINGLE PULSE
T J = MAX RATED
R θ JA = 135 o C/W
T A = 25 o C
10 ms
100 ms
1s
10 s
DC
10
1
SINGLE PULSE
R θ JA = 135 o C/W
T A = 25 o C
10
10
10
0.005
0.1
1
10
100
300
0.5 -4
10
-3
-2
-1
1
10
100
1000
V DS , DRAIN to SOURCE VOLTAGE (V)
Figure 9. Forward Bias Safe Operating Area
t, PULSE WIDTH (sec)
Figure 10. Single Pulse Maximum
Power Dissipation
2
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.1
0.05
0.02
P DM
0.01
t 1
R θ JA = 135 C/W
0.01
SINGLE PULSE
o
t 2
NOTES:
DUTY FACTOR: D = t 1 /t 2
PEAK T J = P DM x Z θ JA x R θ JA + T A
10
10
10
10
0.001
-4
-3
-2
-1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Junction-to-Ambient Transient Thermal Response Curve
?2012 Fairchild Semiconductor Corporation
FDMQ8403 Rev.C2
4
www.fairchildsemi.com
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