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| 型号： | FDMS3500 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/7页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 75V 9.2A POWER56 |
| 产品变化通告： | Power 56 Pkg/Design Change 14/Apr/2009 |
| 产品目录绘图： | Power56 Single |
| 标准包装： | 1 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 75V |
| 电流 - 连续漏极(Id) @ 25° C： | 9.2A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 14.5 毫欧 @ 11.5A，10V |
| Id 时的 Vgs(th)（最大）： | 3V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 91nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 4765pF @ 40V |
| 功率 - 最大： | 2.5W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-PQFN，Power56 |
| 供应商设备封装： | Power56 |
| 包装： | 标准包装 |
| 其它名称： | FDMS3500DKR |
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
BV DSS
T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 A, V GS = 0V
I D = 250 A, referenced to 25°C
V GS = 0V, V DS = 60V,
V GS = ±20V, V DS = 0V
75
71
1
±100
V
mV/°C
A
nA
On Characteristics
V GS(th)
V GS(th)
T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 A
I D = 250 A, referenced to 25°C
1.0
1.8
-6.8
3.0
V
mV/°C
V GS = 10V, I D = 11.5A
11.1
14.5
r DS(on)
Static Drain to Source On Resistance
V GS = 4.5V, I D = 10A
12.8
16.3
m
V GS = 10V, I D = 11.5A, T J = 125°C
17.6
23.0
g FS
Forward Transconductance
V DD = 5V, I D = 11.5A
56
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 40V, V GS = 0V,
f = 1MHz
f = 1MHz
3580
225
120
1.2
4765
300
175
pF
pF
pF
Switching Characteristics
t d(on)
Turn-On Delay Time
16
29
ns
t r
t d(off)
t f
Q g
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
V DD = 40V, I D = 11.5A,
V GS = 10V, R GEN = 6
V GS = 0V to 10V
9
48
6
65
18
77
11
91
ns
ns
ns
nC
Q g
Q gs
Total Gate Charge
Gate to Source Charge
V GS = 0V to 5V
V DD = 40V,
I D = 11.5A
34
9.9
48
nC
nC
Q gd
Gate to Drain “Miller” Charge
11.6
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage
V GS = 0V, I S = 11.5A
V GS = 0V, I S = 2.1A
(Note 2)
(Note 2)
0.8
0.7
1.3
1.2
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = 11.5A, di/dt = 100A/ s
38
45
60
72
ns
nC
NOTES:
1. R JA is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
JC
is guaranteed by design while R
CA is
determined by
the user's board design.
a. 50°C/W when mounted on a
1 in 2 pad of 2 oz copper.
2. Pulse Test: Pulse Width < 30 0 s, Duty cycle < 2.0%.
3. Starting T J = 25 ° C, L = 3mH, I AS = 16A, V DD = 75V, V GS = 10V
b. 125°C/W when mounted on a
minimum pad of 2 oz copper.
?2009 Fairchild Semiconductor Corporation
FDMS3500 Rev.C1
2
www.fairchildsemi.com
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