参数资料
型号: FDMS3500
厂商: Fairchild Semiconductor
文件页数: 3/7页
文件大小: 0K
描述: MOSFET N-CH 75V 9.2A POWER56
产品变化通告: Power 56 Pkg/Design Change 14/Apr/2009
产品目录绘图: Power56 Single
标准包装: 1
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 75V
电流 - 连续漏极(Id) @ 25° C: 9.2A
开态Rds(最大)@ Id, Vgs @ 25° C: 14.5 毫欧 @ 11.5A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 91nC @ 10V
输入电容 (Ciss) @ Vds: 4765pF @ 40V
功率 - 最大: 2.5W
安装类型: 表面贴装
封装/外壳: 8-PQFN,Power56
供应商设备封装: Power56
包装: 标准包装
其它名称: FDMS3500DKR
Typical Characteristics T J = 25°C unless otherwise noted
100
3.0
80
60
V GS = 10V
V GS = 4.5V
V GS = 4V
V GS = 3.5V
2.5
2.0
V GS = 3V
PULSE DURATION = 80 s
DUTY CYCLE = 0.5%MAX
V GS = 3.5V
PULSE DURATION = 80 s
40
DUTY CYCLE = 0.5%MAX
1.5
V GS = 4V
20
V GS = 3V
1.0
V GS = 4.5V
V GS = 10V
0
0.5
0
1
2
3
0
20
40
60
80
100
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
2.0
I D , DRAIN CURRENT(A)
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
40
1.8
I D = 11.5A
V GS = 10V
I D = 11.5A
PULSE DURATION = 80 s
DUTY CYCLE = 0.5%MAX
1.6
1.4
30
T J = 125 o C
20
1.2
1.0
0.8
10
T J = 25 o C
0.6
-75
-50
-25 0 25 50 75 100 125 150
0
2
4
6
8
10
T J , JUNCTION TEMPERATURE ( o C )
Figure 3. Normalized On- Resistance
vs Junction Temperature
100
PULSE DURATION = 80 s
DUTY CYCLE = 0.5%MAX
80
V DS = 5V
V GS , GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
100
V GS = 0V
10
T J = 150 o C
60
40
T J =
150 o C
1
0.1
T J = 25 o C
T J = -55 o C
20
T J =
25 o C
0.01
T J = -55 o C
0
0.001
0
1
2
3
4
5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V GS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
?2009 Fairchild Semiconductor Corporation
FDMS3500 Rev.C1
3
www.fairchildsemi.com
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