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| 型号： | FDMS8848NZ |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/7页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 40V 22.8A POWER56 |
| 产品变化通告： | Power 56 Pkg/Design Change 14/Apr/2009 Product Discontinuation 27/Feb/2012 |
| 产品目录绘图： | Power56 Single |
| 标准包装： | 1 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 40V |
| 电流 - 连续漏极(Id) @ 25° C： | 22.8A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 3.1 毫欧 @ 22.8A，10V |
| Id 时的 Vgs(th)（最大）： | 3V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 152nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 8075pF @ 20V |
| 功率 - 最大： | 2.5W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-PQFN，Power56 |
| 供应商设备封装： | Power56 |
| 包装： | 标准包装 |
| 产品目录页面： | 1609 (CN2011-ZH PDF) |
| 其它名称： | FDMS8848NZDKR |
Electrical Characteristics T J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
BV DSS
T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 A, V GS = 0 V
I D = 250 A, referenced to 25 °C
V DS = 32 V, V GS = 0 V
V GS = ±20 V, V DS = 0 V
40
28
1
±10
V
mV/°C
A
A
On Characteristics
V GS(th)
V GS(th)
T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 A
I D = 250 A, referenced to 25 °C
1.0
1.7
-6
3.0
V
mV/°C
V GS = 10 V, I D = 22.8 A
2.6
3.1
r DS(on)
Static Drain to Source On Resistance
V GS = 4.5 V, I D = 17.5 A
3.3
5.1
m
V GS = 10 V, I D = 22.8 A, T J = 125 °C
3.8
5.3
g FS
Forward Transconductance
V DS = 10 V, I D = 22.8 A
130
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 20 V, V GS = 0 V,
f = 1 MHz
6071
705
466
1.4
8075
940
700
2.8
pF
pF
pF
Switching Characteristics
t d(on)
Turn-On Delay Time
20
36
ns
t r
t d(off)
t f
Q g
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
V DD = 20 V, I D = 22.8 A,
V GS = 10 V, R GEN = 6
V GS = 0 V to 10 V
19
63
13
108
35
101
24
152
ns
ns
ns
nC
Q g
Q gs
Total Gate Charge
Gate to Source Charge
V GS = 0 V to 5 V
V DD = 20 V,
I D = 22.8 A
57
17
80
nC
nC
Q gd
Gate to Drain “Miller” Charge
19
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage
V GS = 0 V, I S = 2.1 A
V GS = 0 V, I S = 22.8 A
(Note 2)
(Note 2)
0.7
0.8
1.2
1.3
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = 22.8 A, di/dt = 100 A/ s
34
28
55
45
ns
nC
NOTES:
1. R JA is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
JC
is guaranteed by design while R
CA is
determined by
the user's board design.
a. 50 °C/W when mounted on a
1 in 2 pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%.
3. Starting T J = 25 ° C, L =1 mH, I AS = 31 A, V DD = 36 V, V GS = 10 V
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
?2009 Fairchild Semiconductor Corporation
FDMS8848NZ Rev C1
2
www.fairchildsemi.com
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