参数资料
型号: FDN327N
厂商: Fairchild Semiconductor
文件页数: 2/5页
文件大小: 0K
描述: MOSFET N-CH 20V 2A SSOT-3
产品培训模块: High Voltage Switches for Power Processing
产品变化通告: Mold Compound Change 08/April/2008
产品目录绘图: SuperSOT-3, SOT-23
标准包装: 1
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 20V
电流 - 连续漏极(Id) @ 25° C: 2A
开态Rds(最大)@ Id, Vgs @ 25° C: 70 毫欧 @ 2A,4.5V
Id 时的 Vgs(th)(最大): 1.5V @ 250µA
闸电荷(Qg) @ Vgs: 6.3nC @ 4.5V
输入电容 (Ciss) @ Vds: 423pF @ 10V
功率 - 最大: 460mW
安装类型: 表面贴装
封装/外壳: TO-236-3,SC-59,SOT-23-3
供应商设备封装: 3-SSOT
包装: 标准包装
产品目录页面: 1602 (CN2011-ZH PDF)
其它名称: FDN327NDKR
Electrical Characteristics
T A = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV DSS
Drain–Source Breakdown Voltage
V GS = 0 V,
I D = 250 μ A
20
V
? BV DSS
? T J
Breakdown Voltage Temperature
Coefficient
I D = 250 μ A,Referenced to 25 ° C
12
mV/ ° C
I DSS
I GSSF
I GSSR
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
V DS = 16 V,
V GS = 8 V,
V GS = –8 V,
V GS = 0 V
V DS = 0 V
V DS = 0 V
1
100
–100
μ A
nA
nA
On Characteristics
(Note 2)
V GS(th)
Gate Threshold Voltage
V DS = V GS ,
I D = 250 μ A
0.4
0.7
1.5
V
? V GS(th)
? T J
Gate Threshold Voltage
Temperature Coefficient
I D = 250 μ A,Referenced to 25 ° C
–3
mV/ ° C
R DS(on)
Static Drain–Source
On–Resistance
V GS = 4.5 V,
V GS = 2.5 V,
I D = 2.0 A
I D = 1.9 A
40
49
70
80
m ?
V GS = 1.8 V, I D = 1.6 A
V GS = 4.5V, I D = 2 A, T J = 125 ° C
65
55
120
103
I D(on)
g FS
On–State Drain Current
Forward Transconductance
V GS = 4.5V,
V DS = 5V,
V DS = 5 V
I D = 2 A
8
11
A
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = 10 V,
f = 1.0 MHz
V GS = 0 V
423
87
48
pF
pF
pF
Switching Characteristics
(Note 2)
t d(on)
t r
t d(off)
t f
Q g
Q gs
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
V DD = 10 V,
V GS = 4.5 V,
V DS = 10 V,
V GS = 4.5 V
I D = 1 A,
R GEN = 6 ?
I D = 2 A,
6
6.5
14
2
4.5
0.89
12
13
29
4
6.3
ns
ns
ns
ns
nC
nC
Q gd
Gate–Drain Charge
0.95
nC
Drain–Source Diode Characteristics and Maximum Ratings
I S
Maximum Continuous Drain–Source Diode Forward Current
0.42
A
V SD
Drain–Source Diode Forward
V GS = 0 V,
I S = 0.42 A
(Note 2)
0.6
1.2
V
Voltage
Notes:
1.
R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R θ JC is guaranteed by design while R θ CA is determined by the user's board design.
a) 250 ° C/W when mounted on a
0.02 in 2 pad of 2 oz. copper.
Scale 1 : 1 on letter size paper
b) 270°C/W when mounted on a
minimum pad.
2.
Pulse Test: Pulse Width ≤ 300 μ s, Duty Cycle ≤ 2.0%
FDN327N Rev C (W)
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