参数资料
型号: FDS4410
厂商: FAIRCHILD SEMICONDUCTOR CORP
元件分类: 小信号晶体管
英文描述: Single N-Channel Logic Level PWM Optimized PowerTrenchTM MOSFET
中文描述: 10000 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET
封装: SO-8
文件页数: 2/8页
文件大小: 241K
代理商: FDS4410
Electrical Characteristics
(
T
A
= 25
O
C unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
BV
DSS
/
T
J
I
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 μA
I
D
= 250 μA, Referenced to 25
o
C
30
V
Breakdown Voltage Temp. Coefficient
21
mV /
o
C
Zero Gate Voltage Drain Current
V
DS
= 24 V, V
GS
= 0 V
1
μA
T
J
= 55°C
10
μA
I
GSSF
I
GSSR
ON CHARACTERISTICS
(Note 2)
Gate - Body Leakage, Forward
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
100
nA
Gate - Body Leakage, Reverse
-100
nA
V
GS(th)
V
GS(th)
/
T
J
R
DS(ON)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 μA
I
D
= 250 μA, Referenced to 25
o
C
1
2
3
V
Gate Threshold Voltage Temp. Coefficient
-4.5
mV /
o
C
Static Drain-Source On-Resistance
V
GS
= 10 V, I
D
= 10 A
0.011
0.0135
T
J
=125°C
0.018
0.023
V
GS
= 4.5 V, I
D
= 9 A
V
GS
= 10 V, V
DS
= 5 V
V
DS
= 10 V, I
D
= 10 A
0.017
0.02
I
D(ON)
g
FS
DYNAMIC CHARACTERISTICS
On-State Drain Current
50
A
Forward Transconductance
27
S
C
iss
C
oss
C
rss
SWITCHING CHARACTERISTICS
(Note 2)
t
D(on)
Turn - On Delay Time
t
r
Turn - On Rise Time
Input Capacitance
V
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
1340
pF
Output Capacitance
340
pF
Reverse Transfer Capacitance
125
pF
V
DS
= 15 V, I
D
= 1 A
V
GS
= 10 V , R
GEN
=
6
12
22
ns
13
24
ns
t
D(off)
t
f
Q
g
Q
gs
Q
gd
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Turn - Off Delay Time
38
60
ns
Turn - Off Fall Time
10
18
ns
Total Gate Charge
V
DS
= 15 V, I
D
= 10 A,
V
GS
= 10 V
22
31
nC
Gate-Source Charge
5
nC
Gate-Drain Charge
4
nC
I
S
V
SD
Maximum Continuous Drain-Source Diode Forward Current
2.1
A
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 2.1 A
(Note 2)
0.73
1.2
V
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is
guaranteed by design while R
θ
CA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
FDS4410 Rev.B1
c. 125
O
C/W on a 0.006 in
2
pad
of 2oz copper.
b. 105
O
C/W on a 0.04 in
2
pad of 2oz copper.
a. 50
O
C/W on a 1 in
2
pad
of 2oz copper.
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