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| 型号： | FDS86252 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/6页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 150V 4.5A 8SOICN |
| 标准包装： | 2,500 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 标准 |
| 漏极至源极电压(Vdss)： | 150V |
| 电流 - 连续漏极(Id) @ 25° C： | 4.5A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 55 毫欧 @ 4.5A，10V |
| Id 时的 Vgs(th)（最大）： | 4V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 15nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 955pF @ 75V |
| 功率 - 最大： | 5W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 带卷 (TR) |
Electrical Characteristics T J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Δ BV DS S
Δ T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0 V
I D = 250 μ A, referenced to 25 °C
V DS = 120 V, V GS = 0 V
V GS = ±20 V, V DS = 0 V
150
103
1
±100
V
mV/°C
μ A
nA
On Characteristics
V GS(th)
Δ V GS(th)
Δ T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25 °C
2
3.4
-11
4
V
mV/°C
V GS = 10 V, I D = 4.5 A
45
55
r DS(on)
Static Drain to Source On Resistance
V GS = 6 V, I D = 3.7 A
57
80
m Ω
V GS = 10 V, I D = 4.5 A, T J = 125 °C
86
105
g FS
Forward Transconductance
V DS = 10 V, I D = 4.5 A
13
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 75 V, V GS = 0 V,
f = 1 MHz
718
77
3.3
0.6
955
105
5
pF
pF
pF
Ω
Switching Characteristics
t d(on)
Turn-On Delay Time
9.2
19
ns
t r
t d(off)
t f
Rise Time
Turn-Off Delay Time
Fall Time
V DD = 75 V, I D = 4.5 A,
V GS = 10 V, R GEN = 6 Ω
1.6
14
2.9
10
24
10
ns
ns
ns
Q g(TOT)
Q gs
Total Gate Charge
Total Gate Charge
Total Gate Charge
V GS = 0 V to 10 V
V GS = 0 V to 5 V
V DD = 75 V
I D = 4.5 A
10.6
5.2
3.5
15
9
nC
nC
nC
Q gd
Gate to Drain “Miller” Charge
2.3
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage
V GS = 0 V, I S = 4.5 A
V GS = 0 V, I S = 2 A
(Note 2)
(Note 2)
0.80
0.76
1.3
1.2
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = 4.5 A, di/dt = 100 A/ μ s
60
74
95
118
ns
nC
NOTES:
1. R θ JA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R θ JC is guaranteed by design while R θ CA is determined by
the user's board design.
a) 50 °C/W when mounted on a
1 in 2 pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μ s, Duty cycle < 2.0 %.
3. Starting T J = 25 o C; N-ch: L = 1 mH, I AS = 11 A, V DD = 135 V, V GS = 10 V.
b) 125 °C/W when mounted on a
minimum pad.
?2011 Fairchild Semiconductor Corporation
FDS86252 Rev. C
2
www.fairchildsemi.com
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