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| 型号： | FDS8813NZ |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/6页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 30V 18.5A 8-SOIC |
| 产品变化通告： | Mold Compound Change 12/Dec/2007 |
| 产品目录绘图： | Power MOSFET, 8-SOP, SO-8 |
| 标准包装： | 1 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 30V |
| 电流 - 连续漏极(Id) @ 25° C： | 18.5A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 4.5 毫欧 @ 18.5A，10V |
| Id 时的 Vgs(th)（最大）： | 3V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 76nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 4145pF @ 15V |
| 功率 - 最大： | 1W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 标准包装 |
| 产品目录页面： | 1604 (CN2011-ZH PDF) |
| 其它名称： | FDS8813NZDKR |
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Δ BV DS S
Δ T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0V
I D = 250 μ A, referenced to 25°C
V DS = 24V, V GS = 0V
V GS = ±20V, V DS = 0V
30
20
1
±10
V
mV/°C
μ A
μ A
On Characteristics (Note 2)
V GS(th)
Δ V GS(th)
Δ T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25°C
1
1.8
-6
3
V
mV/°C
V GS = 10V, I D = 18.5A
3.8
4.5
r DS(on)
g FS
Static Drain to Source On Resistance
Forward Transconductance
V GS = 4.5V, I D = 16A
V GS = 10V, I D = 18.5A,
T J = 125°C
V DS = 5V, I D = 18.5A
4.7
5.1
74
6.0
6.6
m Ω
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = 15V, V GS = 0V,
f = 1MHz
3115
580
345
4145
775
520
pF
pF
pF
R g
Gate Resistance
f = 1MHz
0.1
1.8
5.6
Ω
Switching Characteristics
t d(on)
t r
t d(off)
t f
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
V DD = 15V, I D = 18.5A
V GS = 10V, R GEN = 6 Ω
13
8
39
7
24
16
63
14
ns
ns
ns
ns
Q g
Q g
Total Gate Charge
Total Gate Charge
V GS = 0V to 10V
V GS = 0V to 5V
V DD = 15V
I D = 18.5A
55
28
76
40
nC
nC
Q gs
Q gd
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
9
10
nC
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage
V GS = 0V, I S = 2.1A
(Note 2)
0.7
1.2
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = 18.5A, di/dt = 100A/ μ s
32
27
47
41
ns
nC
Notes
1. R θ JA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R θ JC is guaranteed by design while R θ JA is determined by the user ’s board design.
a) 50°C/W when mounted on a
1in 2 pad of 2 oz copper
b) 125°C/W when mounted on a
minimum pad .
2. Pulse Test: Pulse Width < 300 us, Duty Cycle < 2%.
3. The diode connected between the gate and source serves only as protection against ESD . No gate overvoltage rating is implied.
4. Starting T J = 25 ° C, L = 3mH, I AS = 15A, V DD = 30V, V GS = 10V.
FDS8813NZ Rev.C2
2
www.fairchildsemi.com
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