参数资料
型号: FMS6502MTC24
厂商: Fairchild Semiconductor
文件页数: 13/13页
文件大小: 0K
描述: IC VIDEO SWITCH 8IN/6OUT 24TSSOP
标准包装: 61
功能: 视频交叉点开关
电路: 1 x 8:6
电压电源: 单电源
电压 - 电源,单路/双路(±): 3.135 V ~ 5.25 V
电流 - 电源: 55mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 24-TSSOP
包装: 管件
FMS6502
8-Input,
6-Output
V
ideo
Switch
Matrix
with
Output
Drivers,
Input
Cl
amp,
and
Bias
Circuitry
2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FMS6502 Rev. 1.0.0
9
Applications Information
Input Clamp / Bias Circuitry
The FMS6502 can accommodate AC- or DC-coupled
inputs. Internal clamping and bias circuitry are provided
to support AC-coupled inputs. These are selectable
through the CLMP bits via the I2C-compatible interface.
For DC-coupled inputs, the device should be pro-
grammed to use the 'bias' input configuration. In this con-
figuration, the input is internally biased to 625mV through
a 100k
Ω resistor. Distortion is optimized with the output
levels set between 250mV above ground and 500mV
below the power supply.
With AC-coupled inputs, the FMS6502 uses a simple
clamp rather than a full DC-restore circuit. For video sig-
nals with and without sync; (Y,CV,R,G,B), the lowest volt-
age at the output pins is clamped to approximately
300mV above ground.
If
symmetric
AC-coupled
input
signals
are
used
(Chroma,Pb,Pr,Cb,Cr), the bias circuit can be used to
center them within the input common range. The aver-
age DC value at the output is approximately 1.27V.
Figure 8 shows the clamp mode input circuit and the
internally controlled voltage at the input pin for AC-cou-
pled inputs.
Figure 8. Clamp Mode Input Circuit
Figure 9 shows the bias mode input circuit and the inter-
nally controlled voltage at the input pin for AC-coupled
inputs.
Figure 9. Bias Mode Input Circuit
Output Configuration
The FMS6502 outputs may be AC or DC-coupled. DC-
coupled loads can drive a 150
Ω load. AC-coupled out-
puts are capable of driving a single, doubly terminated
video load of 150
Ω. An external transistor is needed to
drive DC low-impedance loads.
DC-coupled outputs
should be connected as indicated in Figure 10.
Figure 10. DC-Coupled Load Connection
Configure AC-coupled loads as shown in Figure 11.
Figure 11. AC-Coupled Load Connection
When an output channel is not connected to an input, the
input to that particular channel’s amplifier is forced to
approximately 150mV. The output amplifier is still active
unless specifically disabled by the I2C interface. Voltage
output levels depend on the programmed gain for that
channel.
Driving Capacitive Loads
When driving capacitive loads, use a 10
Ω-series resis-
tance to buffer the output, as indicated in Figure 12.
Figure 12. Driving Capacitive Loads
FMS6502
Input
Clamp
75
0.1F
Video source must
be AC coupled
Lowest voltage
set to 125mV
FMS6502
Input
Bias
75
0.1F
Video source must
be AC coupled
Average voltage
set to 625mV
75
FMS6502
Output
Amplifier
75
FMS6502
Output
Amplifier
220F
75
10
FMS6502
Output
Amplifier
C
L
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