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参数资料
| 型号： | FR3-1M |
| 厂商： | TechTools |
| 文件页数： | 18/38页 |
| 文件大小： | 0K |
| 描述： | EMULATOR FLASH FLEXROM III 1MEG |
| 标准包装： | 1 |
| 系列： | FlexROM™ III |
| 类型： | 存储器 |
| 适用于相关产品： | 外部 FLASH、EPROM 或 SRAM 设备 |
| 所含物品： | 需要 FR3 FlexROM III 仿真器、缆线（菊花链、LPT、迷你型夹和目标）、软件、有源缆线模块 |
| 其它名称： | FR31M |
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Hardware Instrumentation
Voltage Monitor/Measurements
FlexROM III constantly monitors the target’s voltage as well as its own. If the target’s voltage drops below
about 2.8V or if the emulator’s internal voltage drops below 3.0 Volts, then the emulator will isolate itself
from the target and assert a target reset.
In addition to monitoring the voltages, FlexROM III reports them to Quickloader so that the user can see
the current target and emulator power status. Quickloader presents this information in its Hardware
Monitor window.
The command-line routines also verify that the emulator has sufficient power to operate reliably before
sending additional commands to the emulator. If the emulator reports insufficient power, the programs will
alert you to the problem.
Trigger
FlexROM III incorporates an address match trigger circuit. This feature generates a pulse on the TRIGGER
output (on the feature connector) each time the target accesses a specified memory location. You can
specify the match value with Quickloader, RTTRIG16 or RTTRIG32. In addition to pulsing the trigger pin,
an internal flag is set to hold the event until FlexROM III’s status register is polled. The status register can
be polled through Quickloader, RTSNAP16 or RTSNAP32.
The TRIGGER output can be used to trigger a Logic Analyzer, SCOPE or logic probe. It could even be
used to trigger some external hardware.
Even if you have a Logic Analyzer, you will find this feature very useful. It is always ready and available
without having to connect 20 or more address lines. Since it is always there (even when somebody
“BORROWS” the logic analyzer), you will tend to make use of it.
When combined with a SCOPE, it provides a fully qualified Logic Analyzer type trigger on address
matches to the SCOPE. When combined with a Logic Analyzer, it eliminates the need to connect all those
signals to the address bus. This can increase the Logic Analyzer’s trigger capabilities, free up all those
extra probes to look at other things and shorten your setup times.
The trigger circuit can even help you diagnose hardware problems during the first bring-up of a new board.
Simple set a trigger at the initial jump vector. Reset the target and see what happens. If you never receive a
trigger, then the processor is not running at all (check power, decodes, oscillators, etc. …) or the chip select
decoding is wrong. If you get continuous triggers, it is being reset over and over. This could be due to bad
op-code fetches (bad data lines..), run-away watch-dogs, faulty reset circuit, etc. If you get the one and only
one trigger expected, move the trigger to MAIN() and see if you get there, and so on.
Another trick involves using simple test programs or even data patterns (NOPS, JUMP-HEREs, JUMP to
0s) to provide predictable stimulus. For example, if you filled the memory with NOPs, most processors
will walk through memory. Since all memory cells contain the same data, we should get the same results,
regardless of stuck address lines or other address problems. If the processor does NOT increment through
memory, it is probably fetching something other than NOPs . This points us to a bad data path. If it does
walk through memory, the data path is reasonably healthy so we look at the address path. We can set a
trigger at each power of 2 (address 0,1,2,4,8,16….). until we find the bad address line. Remember that a 16
bit address bus would require at most 16 trigger settings!
FlexROM III User’s Manual
16
Copyright ? 2001, TechTools
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