参数资料
型号: HB28H016RM2
英文描述: IC Memory CompactFlash /PC-ATA Standard Users Manual/Device
中文描述: 集成电路记忆的CompactFlash / PC的ATA标准用户手册/设备
文件页数: 29/103页
文件大小: 466K
代理商: HB28H016RM2
23
Notes: 1. Note that the meaning of the data differs depending on whether byte access or word
access is used on register 0.
Byte access
CE1
low,
CE2
high: The even byte is accessed first, followed by the odd byte.
CE1
high,
CE2
low: Register 1 ErrorREG. or FeaturesREG is accessed.
Word access
CE1
,
CE2
low: Operates as a word register via D15–D0. A0 is ignored. In this case,
the format is for EvenRD Data + ErrorREG (when reading) or EvenWR Data +
Features REG. (when writing) to exist in the same word.
2. The contents of registers 8–10 are a duplicate of the data in registers 0 and 1. Thus the
following access methods are possible.
Byte access
— When consecutive byte accesses are performed on register 0 (8), the even-byte
data is accessed first, followed by the odd-byte data.
— By performing byte access to register 9 and register 8, in that order, the odd-byte
data is accessed first, followed by the even-byte data.
— By performing byte access to register 8 and register 9, in that order, the even-
byte data is accessed first, followed by the odd-byte data.
— When access is performed alternately to register 0 and register 8, the even-byte
data is accessed first, followed by the odd-byte data.
Byte access cannot be performed on register 9, either singly or consecutively. It
must always be paired with register 8, and used only for extracting odd-byte data
from word data.
Word access
— As in note 1 above. Register 8 can also be handled in the same way as register 0.
3. Data is placed in order in the 1-kbyte memory space from 400 to 7FF, starting at the
selected address.
Of this data, even-address data can be accessed via register 8, and odd-address data
via register 9. Use of this function allows functions such as block transfer to be
implemented between memory areas in the card. However, note that this involves
accessing a FIFO starting with a certain address, and does not mean that the sector
buffer in the CF can be accessed randomly.
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